ICC 200 ICC 300 H-E ICC 350 09.2004 Service manual ERBE ICC 200, ICC 300 H-E, ICC 350 SERVICE MANUAL 10128-002, 10128-009, 10128-010, 10128-015, 10128-016 10128-023, 10128-025, 10128-027, 10128-028, 10128-036 10128-051, 10128-054, 10128-055, 10128-056, 10128-058 10128-061, 10128-064, 10128-065, 10128-066, 10128-070 10128-071, 10128-072, 10128-073, 10128-074, 10128-075 10128-076, 10128-077, 10128-078, 10128-080, 10128-081 10128-082, 10128-083, 10128-200, 10128-202, 10128-204 10128-205, 10128-206, 10128-213, 10128-214, 10128-300 10128-301, 10128-303, 10128-304, 10128-305, 10128-306 10128-307,10128-310, 10128-403 09.2004 This service manual was created by Michael Grosse Dipl.-Phys. (Physicist) Tel Fax E-Mail (+49) 70 71 / 755–254 (+49) 70 71 / 755–5254 [email protected] Net http://www.erbe-med.de Please contact me directly with your suggestions, criticism or information regarding this manual. Your feedback helps me design this document according to your requirements and to constantly improve it. All rights to this service manual, particularly the right to reproduction, distribution and translation, are reserved. No part of this service manual may be reproduced in any form (including photocopying, microfilm or other means), or processed, reproduced or distributed by means of electronic systems without prior written permission from ERBE Elektromedizin GmbH. The information contained in this service manual may be revised or extended without prior notice and represents no obligation on the part of ERBE Elektromedizin GmbH. Copyright © ERBE Elektromedizin GmbH, Tübingen 2004 Printed by: ERBE Elektromedizin GmbH, Tübingen Printed in Germany Art. No.: 80116-201 Contents Art. No.: 80116-201 09 / 2004 Chapter Title Page 0 Table of contents ................................................................................... 5 1 Test programs and adjustments .......................................................... 7 Calling up Test program mode ....................................................................... 10 Basic settings of the SETUP parameters ........................................................ 11 Front panel of the ICC 200 (INT) after starting up the unit ......................... 12 Front panel of the ICC 200 (UL) after starting up the unit .......................... 13 Front panel of the ICC 300 after starting up the unit ................................... 15 Front panel of the ICC 350 after starting up the unit ................................... 16 Test programs 1–8 ........................................................................................... 17 Test program 9 (Display programs 1–12) ..................................................... 28 Test programs 10–15 ....................................................................................... 39 Test program 16 (Adjustments, measuring equipment, jumper) ................. 45 Adjustment of ZMK Neurotest and TUR Neurotest ................................... 105 Adjustment of remote control for Neurotest ............................................... 111 Adjustment of activation and instrument detection .................................... 115 Test program 17, 23 ....................................................................................... 123 2 ERROR list ......................................................................................... 127 3 Circuit description ............................................................................. 137 4 Block diagrams .................................................................................. 169 5 Circuit diagrams ................................................................................. 175 A Appendix A (Part numbers, PCB arrangement) .............................. 241 B Appendix B (Abbreviations, notes, addresses) .............................. 263 5 / 266 6 / 266 Chapter 1 Test programs and adjustments Test programs ERBOTOM ICC 350, 300, 200 Version 4.0 / 3.0 / 2.0 No. Test program function V 4.0 / 3.0 / V 2.0 1 Basic front panel setting (only ICC 300 and 200) x 2 Calls up the Error list x 3 Test of all D-flipflop circuit memories x 4 Test of all front panel visual signals x 5 Test of all acoustic signals x 6 Test of all relays x 7 NESSY: Version number setting x 8 Display of software version no. and option no. x 9 Activation of display programs x 10 Time limit setup 11 Measurement and display of extra-low voltages +15 volts, –15 volts, +24 volts and the temperature 12 Setting the FORCED voltage (2.0: 3 x forced; 4.0: 4 x forced) x x x 13 not assigned 14 not assigned 15 not assigned 16 Test and setting help for all unit calibration functions x 17 Brightness setting for the seven-segment displays x 18 not assigned 19 not assigned 20 not assigned Art. No.: 80116-201 09 / 2004 21 not assigned 22 not assigned 23 AUTO START start delay setup 1 TEST PROGRAMS AND ADJUSTMENTS x 9 / 266 Calling up the TEST PROGRAM mode , , , ,,, , , , 1 ,, , ,, , , ,, , 2 3 4 5 7 8 9 11 12 14 15 16 Note regarding the drawing The front panel shown of the ICC 350 applies to the ICC 200 and ICC 300 in such a way that only the AUTO CUT and AUTO COAG control panels apply to the ICC 300, and the AUTO CUT, AUTO COAG and AUTO BIPOLAR control panels apply to the ICC 300. Calling up Press key 3 (Roll) when switching on the power and hold it down. Setting the test program number Using keys 8 (Up) or 9 (Down), set the required program number. Starting and finishing test programs By pressing key 3 (Roll), start or finish a test program. Exiting the test program mode Exit the TEST PROGRAM MODE by switching off the power or setting TEST PROGRAM no. 0 using key 9 (Down). 10 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Basic settings of the SETUP parameters ERBOTOM ICC 350, 300 and 200 AUTO START delay ICC 350, ICC 300 AUTO START delay ICC 200 Autostart stage Basic settings Remarks 0 0s adjustable using Test program 23 1 0.5 s 2 1s no stepping 0.5 s output max. time limit Auto Cut 90 s Auto Coag 1 90 s Auto Coag 2 90 s Auto Bipolar 90 s NE 1 | || *) Time limit setting ICC 350 NESSY version no. FORCED voltage version Brightness of the seven-segment display *) Test program 10 adjustable using Test program 7 1 adjustable using Test program 12 10 adjustable using Test program 17 || means a split NE electrode, | means a non-split NE electrode, Art. No.: 80116-201 09 / 2004 | || means both split and non-split NE electrode are possible. 1 TEST PROGRAMS AND ADJUSTMENTS 11 / 266 Front panel of the ICC 200 (INT) After starting up the unit Factory setting B asic setting IC C 200 w ithout EN D O C U T option AUTO C UT Effe ct 3 120 watts max. AUTO C OAG FORC ED 60 watts max. AUTO C OAG (with ARGON option) Spray 60 watts max. Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG AUTO C UT Effe ct 3 120 watts max. AUTO C OAG FORC ED 60 watts max. AUTO C OAG (with ARGON option) Spray 60 watts max. Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG END O C UT ON Basic setting ICC 200 with ENDO CUT option 12 / 266 Pulse le ngth tON = 50 ms Pause le ngth tOFF = 750 ms 1 TEST PROGRAMS AND ADJUSTMENTS Front panel of the ICC 200 (UL) After starting up the unit Factory programming Basic programming ICC 200 without ENDO CUT option Effe ct 3 120 watts max. AUTO C OAG FORC ED 60 watts max. Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG Art. No.: 80116-201 09 / 2004 AUTO C UT 1 TEST PROGRAMS AND ADJUSTMENTS 13 / 266 NOTE If the settings are reset, the factory programming of the ICC 200 E and ICC 200 E/A units is lost. It can be restored using the following table. Basic programming ICC 200 E and ICC 200 E/A AUTO C UT Effe ct 3 200 watts max. AUTO C OAG FORC ED 25 watts max. AUTO C OAG SOFT 65 watts max. AUTO C OAG BIPOLAR 20 watts max. AUTO C OAG (for IC C 200 E/A only) Spray 60 watts max. Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG END O C UT ON 14 / 266 Pulse le ngth tON = 50 ms Pause le ngth tOFF = 750 ms 1 TEST PROGRAMS AND ADJUSTMENTS Front panel of the ICC 300 After starting up the unit Factory setting Basic setting ICC 300 Effect 3 150 watts max. AUTO COAG SOFT 60 watts max. AUTO BIPOLAR AUTO START = off 60 watts max. Footswitch setting yellow = AUTO CUT blue = AUTO COAG Art. No.: 80116-201 09 / 2004 AUTO CUT 1 TEST PROGRAMS AND ADJUSTMENTS 15 / 266 Front panel of the ICC 350 After starting up the unit Factory setting Basic setting ICC 350 AUTO CUT Effect 3 150 watts max. HIGH CUT switched off – AUTO COAG 1 SOFT 60 watts max. AUTO COAG 2 FORCED 60 watts max. AUTO BIPOLAR AUTO START = off AUTO STOP = off 40 watts max. Footswitch setting yellow = AUTO CUT blue = AUTO COAG 2 16 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 1 ICC 200, 300 only General description Using this test program, any front panel setting can be made. This setting is known as the basic setting. After termination, the basic setting is stored internally. Only completely saved channels are stored. The basic setting display flashes. Acknowledge by pressing any key. Termination Using “Power off”. Switch off a channel Using the “Down” key (8), set the lowest intensity. Once the lowest display is set, the seven-segment display changes to “---”. This means that the channel has been switched off. Basic setting and brief power failure For a brief power failure of 15 seconds max., the front panel setting last set is displayed. Activation of a channel is blocked if a channel has not been completely set or the basic setting was not acknowledged. The basic setting set at the factory corresponds to the FIXE basic setting. FIXE basic setting A FIXE basic setting is stored in the program. This basic setting is accepted and displayed if: the stored front panel setting is invalid, e.g. through failure of the circuit memory or through battery memory lost, • in Test program 1, the “All off” setting has been accepted. Art. No.: 80116-201 09 / 2004 • 1 TEST PROGRAMS AND ADJUSTMENTS 17 / 266 Test program no. 2 Call up and display of the error memory General description The ICC units are equipped with a system for error detection, error indication and error memory. Every error receives an error number (ERROR no.). The unit stores the last 10 ERROR numbers. Test program 2 displays the stored ERROR numbers. The most recent error occurring chronologically is in memory location 1. Display AUTO CUT AUTO COAG 1 Err. 1 ... 10 AUTO COAG 2 AUTO BIPOLAR xxx xxx: Display of the error number By pressing keys 8 (Up) or 9 (Down), you can call up the memory locations one after another. By pressing key 7, you delete the error numbers at all memory locations. Example After starting the test program with key 3, for example, Error no. 2 appears at memory location 1 with the following display: Display AUTO CUT AUTO COAG 1 Err. 1 18 / 266 AUTO COAG 2 AUTO BIPOLAR 2 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 3 Test of all D-flipflop circuit memories General description Test of all D-flipflop (D-FF) circuit memories. After starting the test with key 3, you will see the following display: Display (ICC 350, ICC 300) AUTO CUT buS *) AUTO COAG 1 AUTO COAG 2 0 AUTO BIPOLAR d0 ... d7 alternating Display (ICC 200) buS d0 ... d7 alternating buS*) (D-FF-Test Nr. 0) tests the external control bus for signal lines d0–d7. The signal lines d0–d7 are switched on and off one after another. The switching statuses can be displayed on the bar graph (adapter board 30183-102). Using the keys 8 (Up) or 9 (Down), you can call up D-FF tests 1-11. You will see the following display: Display (ICC 350, ICC 300) AUTO CUT AUTO COAG 1 dFF 1 ... 11 AUTO COAG 2 AUTO BIPOLAR d0 ... d7 alternating Display (ICC 200) Art. No.: 80116-201 09 / 2004 dFF 1 ... 9 d0 ... d7 alternating The D-FF signal lines d0-d7 are switched on and off one after another. The signals can be measured at the D-FF outputs. There is an error if • there is more than one output status at the same time, • there is constantly an output signal in spite of switching over, • there is no output signal in spite of D-FF activation. *) 1 buS is the seven-segment display for the word „BUS“. TEST PROGRAMS AND ADJUSTMENTS 19 / 266 Test program no. 3 Test of all D-flipflop circuit memories Overview of the D-flipflop tests Test no. D-FF description 20 / 266 Position Remarks 0 external control bus Motherboard 1 D-FF IC 2 Motherboard 2 D-FF IC 3 Motherboard 3 D-FF IC 9 Extra-low voltage and tone 4 D-FF IC 19 Control board 5 D-FF IC 20 Control board 6 D-FF IC 6 ST power stage 7 D-FF IC 10 Senso-board 8 D-FF IC 8 Relay board not ICC 200 9 Extension motherboard slot J9 not ICC 200 10 Extension motherboard slot J9 not ICC 200 11 Extension motherboard slot J9 not ICC 200 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 4 Check of the optical signals on the front panel General description Using this program, you can test the optical displays on the front panel. After starting the test program, you will see the following display: Art. No.: 80116-201 09 / 2004 All optical signals on the front panel are switched on. The 7-segment displays show “8.” for all numbers. 1 TEST PROGRAMS AND ADJUSTMENTS 21 / 266 Test program no. 5 Sound control for all available sounds General description Using this program, you can test and set all available sounds. After starting the program, you will see the following display: Display AUTO CUT AUTO COAG 1 ton 0 ... 4 AUTO COAG 2 AUTO BIPOLAR Using the keys 8 (Up) or 9 (Down), you can set a test number from 0 to 4. The following correspondence applies between the test numbers and the sounds: Test no. Tones switched on 0 22 / 266 Tone variants Remarks Tone generation switched off 1 Basic tone 1 Volume adjustable 2 Basic tone 2 Volume adjustable 3 Basic tone 3 Volume adjustable 4 Basic tone 4 Volume adjustable Basic tone 1 to 3 Volume adjustable Mixed tone: Basic tone 1 and 2 Volume adjustable Mixed tone: Basic tone 1 and 3 Volume adjustable Mixed tone: Basic tone 2 and 3 Volume adjustable Basic tone 1 to 3 Alarm volume Mixed tone: Basic tone 1 and 2 Alarm volume Mixed tone: Basic tone 1 and 3 Alarm volume Mixed tone: Basic tone 2 and 3 Alarm volume 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 5 Sound control for all available sounds Frequency adjustment for warning tones The warning tone frequency setting can be adjusted independently of other assemblies on the low-voltage power supply (jumper J2) with Test program no. 5. Activate Test program no. 5. MP 4 is GND for frequency counter. • Call »Tone 1«: Set frequency at MP 1 with TP 2 to 493 Hz (±2 Hz) with frequency counter. • Call »Tone 2«: Set frequency at MP 2 with TP 3 to 414 Hz (±2 Hz) with frequency counter. • Call »Tone 3«: Set frequency at MP 3 with TP 4 to 329 Hz (±2 Hz) with frequency counter. • To check settings the various tones and mixed tones are generated one after the other by calling »Tone 4«. Here, take especial care that the operating and warning tones have different volumes. Art. No.: 80116-201 09 / 2004 • 1 TEST PROGRAMS AND ADJUSTMENTS 23 / 266 Test program no. 6 Relay test General description Using this program, all relays can be actuated. The NESSY measurement monitor is switched off. After ending the test program, relay no. 1 is switched on for the power starting current limitation. Test program no. 6 is also intended for safety testing of the unit. With this test, there may be a brief failure of the power supply due to the external intervention. If the test program is activated, the test program is automatically called up again after a brief power failure of up to approx. 15 seconds. However, if the power failure is longer than 15 seconds, this will not occur. After starting the test program, you will see the following display: Display AUTO CUT AUTO COAG 1 rEL 0 ... 1 AUTO COAG 2 AUTO BIPOLAR Designation of the PCBs with their assigned relays PCB Slot Relay function Remarks Motherboard ICC 350 – see lines 3 and 4 Motherboard ICC 200 – see lines 3 and 4 Motherboard – Rel. 1: Power starting current limitation Motherboard – Rel. 2: Capacitance ground Power module J5 Rel. 1: Switchover ST generator: HF ST power stage J6 Rel. 1: Output HF: UE1 to NE ST power stage J6 Rel. 2: Output HF: Rel. 3 to AE ST power stage J6 Rel. 3: Output HF: UE1 to AE ST power stage J6 Rel. 19: Connection to power supply Senso-board J7 Rel. 1: Output NE - NESSY Senso-board J7 Rel. 2: Output AE Senso-board J7 Rel. 3: Output NE Relay board J8 Rel. 1: Output AE 1 only ICC 300 / 350 Relay board J8 Rel. 2: Output AE 2 only ICC 300 / 350 ICC 200: Mono output board J8 Rel. 1: Output AE 1 only ICC 200 24 / 266 1 only for ICC 350 TEST PROGRAMS AND ADJUSTMENTS Test program no. 6 Relay test Overview of the relay test options Test no. 0 Switch off all relays Test object Relay status Rel. 1, motherboard switched off all other relays switched off Remarks Power starting current limitation Test no. 1 Switch on all relays Test object Relay status Rel. 1, motherboard switched on Rel. 2, motherboard depending on dongle installed capacitance grounded (only ICC 350) all other relays switched on Remarks Power starting current limitation switched on or off Art. No.: 80116-201 09 / 2004 All relays on PCBs additionally required for the ERBOTOM ICC 350 MIC are switched on. 1 TEST PROGRAMS AND ADJUSTMENTS 25 / 266 Test program no. 7 Setting the NESSY version General description Using this program, you can set four NESSY versions. After starting the test program, you will see the following displays when you activate key 3: Display AUTO CUT AUTO COAG 1 NE.1 || or | AUTO COAG 2 AUTO BIPOLAR In the AUTO COAG field: || means a split neutral electrode, | means of non-split neutral electrode. Using the keys 8 (Up) or 9 (Down), you can set four different NESSY versions: No. AUTO CUT AUTO COAG 1 Remarks 1 NE.1 || or | for split and non-split electrodes 2 NE.2 | only for non-split electrodes 3 NE.3 || only for split electrodes; acoustic (3 times) and visual alarm 4 NE.4 || only for split electrodes; acoustic (continuous tone) and visual alarm At the end of the test, the NESSY version number is stored. Version number 1 is the standard version set when the unit is delivered. In case of memory failure, version no. 1 is automatically set. When switching on the power, version no. 2, 3 or 4 is displayed briefly if this is set. The standard version no. 1 is not displayed. 26 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 8 Display of the software version and any options General description Using this program, you can display the software version, while on the ICC 350 and ICC 300, you can also see the display of an option identification number. After starting the program, you will see the following display: Display AUTO CUT AUTO COAG 1 Snr x.xx AUTO COAG 2 AUTO BIPOLAR y Explanation: x.xx Software version no. (e.g. 2.0) y Option code no. (e.g. 8). Code no. means 0 Unit without option 1 ICC 350: Neurotest ZMK 2 ICC 350: Neurotest TUR 4 8 ICC 350: ENDO CUT function 16 32 64 Art. No.: 80116-201 09 / 2004 128 256 The code number is based on a binary code: Example Code no. 2 means ICC 350 Neurotest TUR Code no. 9 means ICC 350 Neurotest ZMK + Endocut 1 + 8 1 TEST PROGRAMS AND ADJUSTMENTS 27 / 266 Test program no. 9 Activating display programs to display measurement values General description This program activates displays in the standby mode or during activation. With key 3, Test program no. 9 is started. After starting, you will see the following display: Display AUTO CUT AUTO COAG 1 nr. 0 AUTO COAG 2 AUTO BIPOLAR Within Test program no. 9, 22 subprograms for displaying specific data can be called up, while subprograms 16 to 22 are intended only for use by the manufacturer. These subprograms can now be set using keys 8 (Up) or 9 (Down). Once the required display program has been selected, it is reactivated using key 3. The selected display program remains activated until the power is switched off. Display AUTO CUT AUTO COAG 1 nr. 0 ... 22 28 / 266 AUTO COAG 2 1 AUTO BIPOLAR TEST PROGRAMS AND ADJUSTMENTS Display programs nos. 1–3 The selected display program now displays the required data during regular operation of the unit. To do this, the appropriate operating modes must be set and the accessories activated. The display program remains activated until the power is switched off. To return to normal operation, the unit must be switched off for a short time and switched back on again. Display program no. 1: not assigned Display program no. 2: not assigned Display program no. 3: ST generator time control with activation of SPRAY or FORCED. Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR ttt P2 P3 tst ttt Difference between set frequency and actual frequency P2 Set power [W] P3 Set power [W] tst Abbreviation of the test title (Time-ST stage) Display program no. 3: ST generator time control with activation of FORCED. Art. No.: 80116-201 09 / 2004 Display on ICC 200: AUTO CUT AUTO COAG ttt tst ttt Difference between set frequency and actual frequency tst Abbreviation of the test title (Time-ST stage) 1 TEST PROGRAMS AND ADJUSTMENTS 29 / 266 Display programs nos. 4–5 Display program no. 4: ST generator measurement values with ST generator activation. Output measurement values U st, Ist Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR uuu iii P3 UI uuu Measurement value of the output voltage sensor iii Measurement value of the output current sensor P3 Set power [W] UI Abbreviation of the test title (Voltage and current measurement) Display program no. 4: ST generator measurement values with ST generator activation. FORCED activation Display for ICC 200: AUTO CUT AUTO COAG uuu USt uuu Measurement value of the output voltage sensor Display program no. 5: Power supply unit measurement values for ST generator activation. Measurement values Unt, Int Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR uuu iii P3 UI uuu Measurement value of the power supply unit voltage iii Measurement value of the power supply unit current P3 Set power UI Abbreviation of the test title (Voltage, current measurement) 30 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Display program nos. 5–7 Display program no. 5: Power supply measurement values with ST generator activation, FORCED activation. Measurement values Unt, Int Display for ICC 200: AUTO CUT AUTO COAG uuu Unt uuu Measurement value of the power supply unit voltage Display program no. 6: ST generator measurement values for ST generator activation, FORCED activation. Measurement value Ist Display for ICC 200: AUTO CUT AUTO COAG iii Ist iii Measurement value of the output current sensor Display program no. 7: Power supply unit measurement values for ST generator activation, FORCED activation. Measurement value Int Display for ICC 200: AUTO CUT AUTO COAG iii Int Measurement value of the power supply unit current Art. No.: 80116-201 09 / 2004 iii 1 TEST PROGRAMS AND ADJUSTMENTS 31 / 266 Display program no. 8 Display program no. 8: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement value U act Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR ppp uuu cos PU ppp HF power output [W], present power output uuu HF output voltage [V], present output voltage cos PU cos-j-value from the table (ICC 350 only) Abbreviation of the test title (Power and voltage measurement) Display program no. 8: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement value Uact Display for ICC 200: AUTO CUT AUTO COAG ppp P ppp P 32 / 266 HF power output [W] Abbreviation of the test title (Power measurement) 1 TEST PROGRAMS AND ADJUSTMENTS Display program no. 9 Display program no. 9: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement values I real, cos j (Real part of the current and cos j between voltage and current) Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR iii cos ppp IC iii Real part of the measurement value from the HF output current cos ppp cos-j value from the table (ICC 350 only) HF power output [W] for ICC 350 IC Abbreviation of the test title (Current measurement and cos j measurement) Display program no. 9: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement value: Measurement value of the real part of the HF output current Display for the ICC 200: AUTO CUT AUTO COAG iii I Measurement value of the real part of the HF output current I Abbreviation of the test title (Current measurement) Art. No.: 80116-201 09 / 2004 iii 1 TEST PROGRAMS AND ADJUSTMENTS 33 / 266 Display programs nos. 10–11 Display program no. 10: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement value U act Display for the ICC 200: AUTO CUT AUTO COAG uuu U uuu HF output voltage [V] U Abbreviation of the test title (Voltage measurement) Display program no. 11: Measurement values for activation of the sine-wave generator. AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR Output measurement value cos j Display for the ICC 200: AUTO CUT AUTO COAG cos Cos cos cos-j value from the table Cos Abbreviation of the test title (cos-j measurement) 34 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Display program no. 12 (Start) Display program no. 12: Contact resistance at AUTO START, in standby operation. Only valid for AUTO START 0, 1, 2 and in standby operation. Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR uuu P2 P3 br uuu Measurement value of the contact monitor voltage measurement P2 Set power for AUTO COAG 1 [W] P3 Set power for AUTO COAG 2 [W] br Contact monitor Display program no. 12: Contact resistance for AUTO START, in active condition. Only valid for AUTO START 0, 1, 2 and in active condition. Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR rda P2 P3 br Calculated value of the contact resistance [ohms] P2 Set power for AUTO COAG 1 [W] P3 Set power for AUTO COAG 2 [W] br Contact monitor Art. No.: 80116-201 09 / 2004 rda 1 TEST PROGRAMS AND ADJUSTMENTS 35 / 266 Display program no. 12 (continued) Display program no. 12: Contact resistance for AUTO START, in standby operation. Display for ICC 200: AUTO CUT AUTO COAG uuu br uuu Measurement value of the contact monitor voltage measurement br Contact monitor Display program no. 12: Contact resistance for AUTO START, in active condition. Display for ICC 200: AUTO CUT AUTO COAG rda br rda Calculated value of the contact resistance [ohms] br Contact monitor 36 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Display program no. 15 Display program no. 15: NESSY transition resistance in stand-by-operation and on activation. Display for ICC 350 and ICC 300: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR rtr P2 P3 br rtr calculated NESSY transition resistance [Ohm] P2 set power for AUTO COAG 1 [W] P3 set power for AUTO COAG 2 [W] br AUTO START monitor Display program no. 15: NESSY transition resistance in stand-by-operation and on activation. Display for ICC 200: AUTO CUT AUTO COAG rtr r calculated NESSY transition resistance [Ohm] r AUTO START monitor Art. No.: 80116-201 09 / 2004 rtr 1 TEST PROGRAMS AND ADJUSTMENTS 37 / 266 Display programs nos. 13–22 NOTE Display programs nos. 13 and 14 are not assigned. The program nos. 17–22 are only intended for internal use by the manufacturer. 38 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 10 Changing the maximum time limit General description Using this program, you can change the time limit for the ICC 200, 300 and 350. The setting range varies from 3 to 960 seconds. Using the appropriate “Up” or “Down” keys, the time limit restriction for every current quality can be set individually. For the ICC 350, various time limit settings can be stored in the individual program memories for each user. This occurs after selecting the program number with program memory key 2 and then changing the respective current qualities using the appropriate “Up” or “Down” key. After termination of Test program 10 using key 3, the settings made are stored. In case of memory failure, as well as in the delivery condition, the max. time limit for all programs and current qualities (CUT, COAG 1, COAG 2, BIPOLAR) is set at 90 seconds. After starting Test program 10 with key 3, you will see the following display: AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR t1 t2 t3 t4 • t1: Time limit restriction for AUTO CUT in seconds • t2: Time limit restriction for AUTO COAG 1 in seconds • t3: Time limit restriction for AUTO COAG 2 in seconds • t4: Time limit restriction for AUTO BIPOPLAR in seconds. Using the following keys, you can adjust the max. time limit (see page 1-4): : Keys 4 and 5 • AUTO COAG 1 : Keys 8 and 9 • AUTO COAG 2 : Keys 11 and 12 • AUTO BIPOLAR : Keys 15 and 16 Art. No.: 80116-201 09 / 2004 • AUTO CUT 1 TEST PROGRAMS AND ADJUSTMENTS 39 / 266 Test program no. 11 Measurement value output for the measurement channels Using this program, you can measure the internal supply voltages and the temperature of the unit. In addition, you can display all analog direct measurement channels 1, 2, 3 and 4 as well as analog multiplex measurement channels. After starting the test program, you will see the following display: Display ICC 350 / 300 AUTO CUT AUTO COAG 1 AUTO COAG 2 U 0 XX.X U– 1 XX.X U 2 XX.X tPt ttt xxx Ch 4 … 22 yyy • XX.X Voltage value [V] • ttt Temperature [°C] • xxx ADC measurement value in the range 0 … 255 • yyy ADC measurement value in the range 0 … 255 AUTO BIPOLAR Using the keys “Up” (8) or “Down” (9), call up the subprograms U, U-, tPt and Ch 4 … 22. U0 is the low voltage controlled to +15 volts ±10% U–1 is the low voltage controlled to –15 volts ±10% U2 is the low voltage controlled to 24 volts ±10% tPt is the temperature display of the output stage ±15% Ch4 … 22 are the analog measurement channels according to the following table: Display ICC 200 AUTO CUT AUTO COAG 1 U.15 XX.X –15 XX.X U.24 XX.X tPt ttt C.aa yyy 40 / 266 AUTO COAG 2 1 AUTO BIPOLAR TEST PROGRAMS AND ADJUSTMENTS Test program no. 11 Measurement value output of the measurement channels • XX.X Voltage rating [ V ] • ttt Temperature [°C ] • C.aa Channel number • yyy ADC measurement value in the range 0 ... 255 Using the “Up” (8) or “Down” (9) keys, call up the subprograms U, U-, tPt und C. 4-22. U0 is the supply voltage controlled to +15 volts U–1 is the supply voltage controlled to –15 volts U2 is the supply voltage controlled to +24 volts tPt is the temperature display of the output stage C. 4 … 22 are the analog measurement channels according to the following table. Voltage test U 0 or U.15 Measurement and display of the supply voltage controlled to +15 volts Display XX.X: e.g. 14.6 equals 14.6 volts Voltage test U–1 or –15 Measurement and display of the supply voltage controlled to –15 volts Display XX.X: e.g. 14.6 equals –14.6 volts Voltage test U 2 or U.24 Measurement and display of the supply voltage controlled to +24 volts Display XX.X: e.g. 23.6 equals +23.6 volts Measurement of the output stage temperature Art. No.: 80116-201 09 / 2004 Display tPt 25 means that the temperature inside the unit is 25 °C. Test of the analog measurement channels (Subtest 4 … 22) Measurement and display of 19 analog measurement channels inside the unit. (Intended for internal use by the manufacturer only). 1 TEST PROGRAMS AND ADJUSTMENTS 41 / 266 42 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 12 Setting the FORCED voltage General description When this program is called up, the set FORCED version is displayed. Using the “Up” (8) or “Down” (9) keys, you can set one of three (V2.0) or four (V4.0) FORCED versions. With FORCED coagulation, the ST pulse generator produces short pulses with a high no-load voltage. The high no-load voltage has both advantages and disadvantages which are described in this section with the features. Using Test program 12, the no-load voltage can be changed relative to the set power limitation. After starting the test program, you will see the following display: AUTO CUT AUTO COAG 1 For. vs nr AUTO COAG 2 For. Voltage limitation for FORCED coagulation vs nr: FORCED version nos. 1…3 (V2.0) or 1…4 (V4.0) AUTO BIPOLAR Call up the version number using the “Up” (8) or “Down” (9) keys. Forced version vs nr 1 A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 1,300 Vp. Above 30 watts power limitation, the no-load voltage is limited to approx. 1,300 Vp. Characteristics of the version vs nr 1 • Minimal image interference on monitors. • Danger of burns from contact with a terminal. • Good coagulation via a terminal without heavy spark formation. • No heavy spark formation even at a high power setting. • To direct power into the tissue, the tissue must be contacted (No power transmission via spark). Art. No.: 80116-201 09 / 2004 FORCED version vs nr 2 A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 1,300 Vp. Above 30 watts power limitation, the no-load voltage continues to increase: No-load voltage at 40 watts: approx. 1,500 Vp No-load voltage at 50 watts: approx. 1,700 Vp No-load voltage at 60 watts: approx. 1,900 Vp No-load voltage from 80 to 120 watts: approx. 2,300 Vp. 1 TEST PROGRAMS AND ADJUSTMENTS 43 / 266 Test program no. 12 Setting the FORCED voltage Characteristics of version vs nr 2 The characteristics are between those of the vs nr 1 and those of the vs nr 3. FORCED voltage version vs nr 3 A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 2,300 V p. Above 30 watts power limitation, the no-load voltage is limited to approx. 2,300 Vp. Characteristics of version vs nr 3 • Image interferences on monitors possible. • Danger of burns from contact with a terminal possible. • Heavy spark formation with coagulation via a terminal. • Heavy spark formation also at a 30 watts power setting. To direct high-frequency power into the tissue, the tissue must not necessarily be contacted (current flow or powered transmission [see vs nr 2] possible via arc). FORCED voltage version vs nr 4 A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 2,600 Vp. Above 30 watts power limitation, the no-load voltage is limited to approx. 2,600 Vp. Characteristics of version vs nr 4 • Image interference on monitors possible. • Danger of burns from contact with a terminal possible. • Heavy spark formation with coagulation via a terminal. • Heavy spark formation also at a 30 watts power setting. To direct high-frequency power into the tissue, the tissue must not necessarily be contacted (current flow or powered transmission [see vs nr 2] possible via arc). Important notes • The vs no set only applies to FORCED AUTO COAG 1, FORCED AUTO COAG 2 and for programs 0 to 11. • For the MIC program, vs nr 1 is automatically set. • In case of memory failure, vs nr 1 is automatically set. When switching on the power supply, vs nr 2, vs nr 3 or vs nr 4 (V4.0) is briefly displayed. The standard vs nr 1 is not displayed. 44 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 16 Pre-information: Recommended measuring equipment Measuring equipment To service equipment from the ICC series, various meters are necessary. The following list summarizes recommended measuring equipment for a quick overview. ATTENTION ! Individual parts and boards are at supply voltage potential. After removing the housing cover, there is risk of electrical shock due to unintentional contact with the power plug connected. The HF power meter, the oscilloscope and the frequency counter must be operated as floating. The unit contains a lithium battery which must only be discarded in battery collection containers in completely discharged condition (i.e. after use). Otherwise, care must be taken to prevent shorting in accordance with the battery regulations. EE order no. (230 V; 50/60 Hz) EE order no. (120 V; 50/60 Hz) Testbox 2 20183-040 20183-041 70 V testbox for spark monitor ICC 20100-019 20100-028 Measuring equipment Art. No.: 80116-201 09 / 2004 HF power meter — Isolating transformer for APM 600 20100-013 Adapter cable for NESSY monitor 20100-003 Bipolar adapter cable 20100-004 Measurement cable for LF patient leakage current 20100-009 (standard) Measurement cable for LF patient leakage current 20100-012 (international) 2-channel oscilloscope (> 40 MHz) — Frequency counter — Multimeter with µA range — Bipolar testbox automatic starter ICC 20100-017 Extension board 30183-106 1 TEST PROGRAMS AND ADJUSTMENTS 45 / 266 Test program no. 16 Pre-information: Jumper on the display board General information On the display board, there are slots for jumper which, by plugging in so-called “jumpers”, can activate special software by which our HF surgical units from the ICC series can be adapted to prescribed special conditions (such as are necessary in various countries) or by means of which specific tests can be performed by the testing department and service. WARNING These jumpers are already positioned during production and must never be changed randomly. For a software update, make certain that the jumpers are correctly plugged in. Back-up plugs are in the bag with the spare fuses. Where are the slots for the jumpers? If you look at the display board inside the open unit from the perspective of the rear panel, the following stylized image can be seen: J3–J6 6 3 Connector to the CPU LED display LED display LED display LED display J7–J10 7 10 J7–J10 7 10 Only at right on ICC 300 Two blocks are available to receive jumpers: At the top right is a block with the slots J3–J6, at the bottom left (ICC 300: bottom right) is the block with the slots J7–J10. 46 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 16 Pre-information: Jumper on the display board Block 1 Jumper plugged in Jumper not plugged in Output circuitry with capacitance ground. Output circuitry is "floating output". Maximum temperature of generator is displayed (ERROR 11). The unit is delivered with this setting. J5 J5 functions together with J6. (see following explanation) (see following explanation) J6 J6 functions together with J5. (see following explanation) (see following explanation) Pos. Function Only ICC 350: Switchover of neutral J3 electrode to "capacitance grounded" or "floating output". J4 Only for test purposes. Temperature display. Art. No.: 80116-201 09 / 2004 The J5 and J6 slots are read by the CPU as a binary number. In this way four different functioning methods, independent from one another, are programmable by plugging in these jumpers: J5 J6 Description of the set function free free None of the following 3 programs is selected. plugged free Contact monitor is blocked and AUTO START display is "off". free plugged During activation, another activation signal from some other source has switched off the unit activation (Spanish regulation). F leakage current > 150 mA, but < 300 mA: Triple visual and acoustic alarm is triggered. plugged plugged HF leakage current > 300 mA: The HF generator is switched off. Visual and acoustic alarm is triggered. 1 TEST PROGRAMS AND ADJUSTMENTS 47 / 266 Test program no. 16 Pre-information: Jumper on the display board Block 2 (as of Version 1.06) Pos. Function Jumper plugged in Jumper not plugged in (not applicable) (not applicable) J7 (not in use) Deactivation of ERROR 30 Low-resistance load operation possible for BIPOLAR COAG (as of V 2.00): < 5 ohms triggers ERROR 30 - after 4 s red LED (output to protect accessories and error) J8 generator. - Output current max. 1.5 A ERROR 30 can be - no ERROR indication deactivated here when (This specification especially activating AUTO BIPOLAR. applies to the USA.) ERROR 30 warning appears due to delivery status (not USA, ERROR 30 deactivated here). Regardless of the selection, special settings are necessary for specific countries. These can be found in the following matrix. Explanation: 1 Jumper must be plugged in, o Jumper must not be plugged in, x (according to the description for Block 1). 48 / 266 Country J5 J6 J7 J8 Germany o o no function per above table European countries (excepted: see below) o o no function per above table Great Britain 1 o no function per above table Spain o 1 no function per above table Japan 1 1 no function per above table USA x x no function 1 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 16 Pre-information: Jumper on the display board Note regarding ERROR 30 With bipolar coagulation, it may happen that, over a longer period of time, a short circuit occurs on one of the bipolar forceps. Particularly for thin forceps, there is a danger with a short circuit that the forceps begin to glow due to the high current and the HF generator is damaged due to a mismatch. Since tissue resistance quickly reaches values above 50 ohms during a coagulation process with conventional bipolar instruments, normally after starting the coagulation by desiccating the tissue, it is assumed that, with a continuously low resistance of less than 50 ohms, an error status results which is indicated by ERROR 30. In addition, there are large-area coagulation forceps for which a resistance less than 50 ohms is set, insofar as the legs are only open to a small degree. If the operating surgeon activates such an instrument with a small leg opening, ERROR 30 is indicated after approx. 5 seconds and activation is switched off. This error message is felt to be a nuisance by some operating surgeons. In these particular cases, the ERROR 30 error message can be switched off on units above Version 2.00 by means of the jumper in position J8. In this case, at a resistance less than 50 ohms, the output current of the ICC is limited to 1.5 A. WARNING Art. No.: 80116-201 09 / 2004 For a power setting greater than 20 W, there is a danger of destroying the HF generator after approx. 1 minute during short-circuit operation. There is no warning if the ERROR 30 error message is switched off. 1 TEST PROGRAMS AND ADJUSTMENTS 49 / 266 Test program no. 16 General description General description All adjustment work is performed solely with the help of this test program. Here the sequence from Adjustment 1 to Adjustment 13 must be followed. Ending the test is only possible at the setting Adjustment 0 (as of 0 in the display). If Test program 16 is activated, the test program is automatically called up again if there is a brief power failure lasting up to approx. 15 seconds. If the power failure lasts longer than 15 seconds, the test program is no longer automatically called up. This text describes only the function of the program. The unit is adjusted according to the adjustment instructions. These adjustment instructions are a component of the service documents. After starting the test program with key 3, you will see the following display: Display ICC 350 / 300 AUTO CUT AUTO COAG 1 Ab xx (0 … 13) xx AUTO COAG 2 AUTO BIPOLAR Adjustment test number (beginning with 0) Display ICC 200 AUTO CUT AUTO COAG Ab xx xx Adjustment test number (beginning with 0) Adjustment 0 permits entry and exit from Test program 16. 50 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 16 List of individual adjustments Test program 16: Adjustment List of individual adjustments Function of the adjustment 1 Phase relationship of the power supply unit 2 Current/voltage setting of the power supply unit 3 Setting of the actuation pulse length for the HF generator 4 Phase relationship of the HF generator 5 Current/voltage setting of the HF generator 6 Current/voltage setting of the amplified measurement values of the HF generator 7 Phase angle setting (cos Phi) 8 Adjustment of the function monitor sensor 9 NESSY adjustment: Contact resistance 10 HF leakage current monitor 11 Starting threshold of the contact monitor 12 Length of actuation pulse and frequency setting of the ST generator 13 LF leakage current measurement and setting help for CF Art. No.: 80116-201 09 / 2004 Using the “Up” (8) and “Down” (9) keys, call up an adjustment test number. Start the adjustment test with key 3. 1 TEST PROGRAMS AND ADJUSTMENTS 51 / 266 52 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 1 1 TEST PROGRAMS AND ADJUSTMENTS 53 / 266 Adjustment 1 Power supply unit phase relationship Procedure • Unplug power cable from the ERBOTOM ICC. • Pull off the black lines on the bridge-connected rectifier BR 1 on the motherboard and connect an adjustable isolating transformer to BR 1 in its place, the output voltage of which is adjusted to 0 V. With well prebalanced boards, a transformer with a fixed voltage of approx. 155 V AC can also be used. ATTENTION ! For units which are set to 120 V, you must absolutely make certain that the Erbotom ICC is operated via an isolated transformer. In addition, the connection between J15 and J20 on the motherboard must be removed from J15. • Connect 200 ohms load resistance (e.g. APM 600) to MP1 = GND and MP2 on the power module (slot J5). • Connect the oscilloscope to MP1 = GND and MP2 = probe on QC power stage end stage (slot J4). • Plug the power cable for the Erbotom ICC back in and activate Test program 16, Adjustment 1. • Activate using the yellow pedal on the footswitch (AUTO CUT). • Slowly increase the output voltage on the isolating transformer. With a correct setting, the voltage characteristic corresponds to the graph illustrated below, whereby the small dip (approx. 20 V) next to the square-wave edges represent a good criterion of evaluation for this. • Set the phase angle using TP13 (control board, slot J3). For the final setting, the square-wave voltage must be increased to approx. ±100 V. (Display in AUTO CUT approx. 205). • After the setting is complete, disconnect the ERBOTOM ICC from the power, remove the cable from the isolating transformer to BR1 and connect the two black lines again to the bridge-connected rectifier. Fig.: Voltage characteristic of supply unit power T 1> 1) Ch 1: 54 / 266 50 Volt 500 ns 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 1 Power supply unit phase relationship ICC 350 ICC 300 Art. No.: 80116-201 09 / 2004 AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR Ab nPh before activation U NTG nPh during activation ICC 200 AUTO CUT AUTO COAG Ab nPh before activation U NTG nPh after activation • U NTG Power supply unit voltage [V] • nPh Adjustment of the phase relationship for the power supply unit generator 1 TEST PROGRAMS AND ADJUSTMENTS 55 / 266 56 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 2 1 TEST PROGRAMS AND ADJUSTMENTS 57 / 266 Adjustment 2 Power supply unit output parameters Procedure • Connect 500 ohms load resistance (APM 600) to MP1 = GND and MP2 = +U on “Power Module” board (slot J5). • Plug in the power cable on the ICC. • Call up Test program 16, Adjustment 2. • Activate ERBOTOM ICC using the yellow footswitch pedal (AUTO CUT). • Set TP2 on the control board (slot J3) in such a way that 100 W (tolerance +0% / –7%) can be measured at the HF power meter and a power supply current of 447 mA (tolerance 444...455 mA) is displayed in the AUTO COAG 1 display. In the AUTO CUT display, a power supply voltage of 223 V (tolerance 223…227 V) is displayed. • Disconnect the ICC from the power and remove the connecting cable from MP1 and MP2. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 Ab 2 U NTG I NTG AUTO COAG 2 AUTO BIPOLAR I NTG V1 nUI before activation nUI during activation • U NTG Power supply voltage [V]; Set value = 223 V • I NTG Power supply current [mA]; Set value = 447 mA • I NTG V1 Amplified power supply current [mA] • nUI Adjustment of the current voltage setting of the power supply generator ICC 200 AUTO CUT U NTG AUTO COAG nUI before activation I NTG after activation • U NTG Power supply voltage [V]; Set value = 223 V • I NTG Power supply current [mA]; Set value = 447 mA 58 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 2 Art. No.: 80116-201 09 / 2004 Power supply unit output parameters 1 TEST PROGRAMS AND ADJUSTMENTS 59 / 266 60 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 3 1 TEST PROGRAMS AND ADJUSTMENTS 61 / 266 Adjustment 3 Actuation pulse length HF generator Procedure • Measure the actuation pulse TS1 on the control board (slot J3) with an oscilloscope at measuring point MP6 = GND and MP2 = probe tip. • Switch on the ICC and call up Test program 16, Adjustment 3. • Using TP14 on the control board (slot J3), set a pulse length of 350 ns. ATTENTION: Pulse is inverted. • Disconnect the ICC from the power. • Remove the probe from MP6 and MP2. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 Ab 3 • thF AUTO COAG 2 AUTO BIPOLAR thF Pulse length of the HF generator [ms]; auto. activated Set value = 350 ns ICC 200 AUTO CUT AUTO COAG thF • thF 62 / 266 Pulse length of the HF generator [ms]; auto. activated Set value = 350 ns 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 3 Actuation pulse length HF generator 5 V/Div Art. No.: 80116-201 09 / 2004 100 ns/Div Fig.: Transistor switching pulse 1 TEST PROGRAMS AND ADJUSTMENTS 63 / 266 64 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 4 1 TEST PROGRAMS AND ADJUSTMENTS 65 / 266 Adjustment 4 Phase relationship HF generator Procedure • Switch the ICC back on and call up Test program 16, Adjustment 4. • With probe 100 : 1, the no-load HF output voltage between the active and neutral electrode must be measured; for 2 monopolar outputs: Output CUT / COAG 2. • Activate the ICC using the yellow footswitch pedal (AUTO CUT). • Observing the output voltage form, increase the power supply voltage in the CUT field (AUTO CUT display corresponds to the set power supply voltage; AUTO COAG 1 display corresponds to the actual power supply voltage). Using TP15 on the control board (slot J3), a symmetrical sine-wave characteristic must be set. • At a maximum power supply voltage (= 250 V), make the final adjustment. At the same time, set a good symmetrical sine-wave shape and a minimum power supply current (= display in AUTO BIPOLAR field), which means a minimal no-load power loss (see Fig.). CAUTION: The best possible sine-wave characteristic has priority over the absolute current minimum. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 U SOLL = 30 V 4 U SOLL U NTG AUTO COAG 2 AUTO BIPOLAR I NTG V1 • U SOLL Set power supply voltage [V] • U NTG Power supply unit voltage [V] Ph before activation I NTG during activation • I NTG V1 Amplified power supply current [mA] • I NTG Power supply current [mA] ICC 200 AUTO CUT AUTO COAG U SOLL (Start = 30 V) nPh before activation U SOLL U NTG after activation • U SOLL Set power supply voltage [V] • U NTG Power supply unit voltage [V] 66 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 4 Phase relationship HF generator 300 V/Div Art. No.: 80116-201 09 / 2004 500 ns/Div Fig.: HF no-load voltage 1 TEST PROGRAMS AND ADJUSTMENTS 67 / 266 68 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 5 1 TEST PROGRAMS AND ADJUSTMENTS 69 / 266 Adjustment 5 HF generator output parameters Procedure • Call up Test program 16, Adjustment 5. • Connect the HF power meter, e.g. APM 600 (set to 500 ohms) via active cable to active and neutral electrode output sockets on the ICC; for 2 monopolar outputs: CUT / COAG 2 output and NE socket. • Activate the unit with the yellow pedal of the footswitch (AUTO CUT). • Using TP3 on the control board (slot J3), the HF output voltage is set in such a way that a power of 100 watts is indicated on the HF power meter and a value of 223 volts HF effective voltage (tolerance 220…223 volts) in the display on the AUTO CUT field. • Under certain conditions, TP 4 (HF current limitation) must be turned back far enough before this setting so that no current limitation is effective. • Using TP4 on the control board (slot J3), the HF current limitation is set in such a way that a value of 447 mA effective HF current (tolerance 439…447 mA) with constant power output appears in the AUTO COAG 1 field. • Insofar as the measurement of the phase angle between HF voltage and HF current produces a value greater than 98 (which is 100 · cos j) at this setting in the AUTO COAG 2 field, a value of 100 watts HF power output is displayed (tolerance 97...100 watts) in the AUTO BIPOLAR field after correct adjustment of voltage and current. • For the voltage characteristic at a 500 ohms load, see Fig. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 Ab 5 U HF I HF AUTO COAG 2 AUTO BIPOLAR cos Phi UI before activation P during activation ICC 200 AUTO CUT AUTO COAG U HF UI before activation I HF after activation • U HF HF voltage [V]; • I HF Real part of HF current [mA]; 70 / 266 Set value = 223 V Set value = 447 mA 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 5 HF generator output parameters Art. No.: 80116-201 09 / 2004 100 V/Div Fig.: HF voltage at R = 500 ohms 500 ns/Div • cos Phi Phase angle 0…100*) •P Emitted active power Set value = 100 [W]; Set value = 100 watts at 500 R cos-j display, when the “Up” (8) key is pressed. P display, when the“Down” (9) key is pressed. *)To avoid decimal places, the value of the table value of cos j is indicated times 100, such that 100 means cos j = 1. 1 TEST PROGRAMS AND ADJUSTMENTS 71 / 266 72 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 6 1 TEST PROGRAMS AND ADJUSTMENTS 73 / 266 Adjustment 6 HF generator output parameters amplified Procedure • Call up Test program 16, Adjustment 6. • With the same setup as for Adjustment 5, the unit is activated. At the same time, 5 watts (tolerance 4.5…5.5 watts) should be output at the HF power meter. • Using TP 5 on the control board (slot J 3), the amplified HF voltage measurement is set in such a way that a value of 50 volts HF output voltage is displayed in the AUTO CUT field. • Using TP 6 on the control board, the amplified HF current measurement is set. The value 100 mA Hf output current is displayed in the AUTO COAG 1 field when set correctly. • In the Auto Bipolar field, the emitted active power is displayed. • In the Auto Coag 2 field, the phase angle cos j is displayed. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 Ab 6 U HF I HF AUTO COAG 2 AUTO BIPOLAR cos Phi UI before activation P during activation ICC 200 AUTO CUT U HF AUTO COAG UI before activation I HF after activation • U HF HF voltage amplified [V]; Set value = 50 V • I HF Real part of the amplified HF current [mA]; Set value = 100 mA • cos Phi Phase angle 0…100 from the table Set value = 100 •P Emitted active power Set value = 5 watts at 500 R [W]; ICC 200: cos-j display appears when the “Up” (8) key is pressed. P-display appears when the “Down” (9) key is pressed. 74 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 6 Art. No.: 80116-201 09 / 2004 HF generator output parameters amplified 1 TEST PROGRAMS AND ADJUSTMENTS 75 / 266 76 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 7 1 TEST PROGRAMS AND ADJUSTMENTS 77 / 266 Adjustment 7 Phase angle (cos j) Procedure • Call up Test program 16, Adjustment 7. • Using ERBE original cable, connect the APM 600 (set at 500 ohms) to the ICC; with 2 monopolar connections: Connect active output socket: CUT / COAG 2 (ICC 300 / 350) and NE socket. • Connect a capacitor with 1 nF (e.g. ERBE component no. EE 51103-026) with short lines across the active electrode and NE sockets on the HF power meter. This produces a phase shift between voltage and current of 45° at a frequency of 340 kHz. • Activate the cut footswitch. • Using TP 7 on the control board (slot J3), the unit is set in such a way a value of 73 (display is 100 · cos j) is displayed in the AUTO CUT field and a value of 120 (analog / digital converter measured value) is displayed in the AUTO COAG 1 field. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR Ab 7 PHI before activation COS xxx PHI during activation ICC 200 AUTO CUT COS • COS AUTO COAG PHI before activation xxx after activation cos-j values from table; Set value = 73 0 means phase shifting = 90° 100 means phase shifting = 0° • xxx Analog cos-j measurement value; • Veff HF output voltage; Range 0…255 200 mA output current limitation 78 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 7 Art. No.: 80116-201 09 / 2004 Phase angle (cos j) 1 TEST PROGRAMS AND ADJUSTMENTS 79 / 266 80 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 8 1 TEST PROGRAMS AND ADJUSTMENTS 81 / 266 Adjustment 8 Spark monitor Procedure (also applies to the units without HIGH CUT or ENDO CUT) • On the ICC 300 and ICC 200 without ENDOCUT, TP8 should be set to the upper limit (to do this, turn TP8 clockwise). • Call up Test program 16, Adjustment 8. • A DC voltage of 70 volts is fed into the patient circuit between the center control for the active AE socket (with 2 monopolar outputs: Output CUT / COAG 2) and the neutral electrode NE socket (AE = +, NE = –). To do this, the ERBE TESTBOX 70 volts is recommended (ERBE Order no. 20100-019). • Adjust TP8 on the control board (slot J3) is set in such a way that a measurement value of 77 is indicated for the A/D converter, and a value of 70 volts DC is displayed in the AUTO COAG 1 field. On the ICC 200 ENDOCUT, this value appears in the AUTO CUT field, while the A/D converter value is not shown. ICC 350 AUTO CUT AUTO COAG 1 xxx yyy AUTO COAG 2 AUTO BIPOLAR FU Standby ICC 200 ENDO CUT AUTO CUT AUTO COAG yyy FU Standby • yyy Fed-in DC voltage for the spark measurement value (70 V) • xxx Analog spark measurement value The input for applying the test DC voltage is the CUT / COAG 2 socket. 82 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 8 Art. No.: 80116-201 09 / 2004 Spark monitor 1 TEST PROGRAMS AND ADJUSTMENTS 83 / 266 84 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 9 1 TEST PROGRAMS AND ADJUSTMENTS 85 / 266 Adjustment 9 NESSY resistance measurement Procedure • Call up Test program 16, Adjustment 9. • Connect an NE cable to the NE input receptacle on the ICC system. • Connect the other end of the NE cable between 120 ohms of resistance. • Set TP9 on the control board (slot J3) in such a way that a measurement value of 200 for the A/D converter is displayed in the AUTO CUT field and a resistance of 120 ohms is displayed in the AUTO COAG 1 field. • Now exchange the terminating resistor for a resistance value of 40 ohms. Now verify the measurement at this resistance; a resistance of 40 ohms (tolerance 37...43 ohms) must be displayed in the AUTO COAG 1 field. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 xxx R üb AUTO COAG 2 AUTO BIPOLAR r Standby ICC 200 AUTO CUT AUTO COAG xxx R üb Standby • R üb Contact resistance at the neutral electrode [W] • xxx Analog measurement value of the contact resistance. For resistance values outside the measurement accurary, the display --- appears. 86 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 9 Art. No.: 80116-201 09 / 2004 NESSY resistance measurement 1 TEST PROGRAMS AND ADJUSTMENTS 87 / 266 88 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 10 1 TEST PROGRAMS AND ADJUSTMENTS 89 / 266 Adjustment 10 HF leakage current measurement Procedure (This adjustment only applies to the ICC 350) • Call up Test program 16, Adjustment 10. • Connect the HF power meter (set to 350 ohms load resistance) between the active electrode of the CUT / COAG 2 (center) socket and the potential equalization. • Jumper J3 must be plugged into the display board for this adjustment (earthed reference). • Short together the NE-ERBE original adapter cable. Activate the ICC 350 using the blue footswitch pedal (AUTO COAG 1). • Using the power setting in the AUTO COAG 1 field, set the leakage current flowing to ground to a value of 150 mAeff (tolerance 131…169 mA) (use an HF effective current meter or set a power of 7.9 watts at a HF power meter with a load resistance of 350 ohms [tolerance 6.0…10 watts (from P = I² · R with P = 7.9 watts and R = 350 ohms is a current I = 150 mA)]). • Set TP10 on the control board (slot J3) in such a way that the HF leakage alarm is thus displayed visually (the LED in the safety field flashes in the display indicates the value 50 in the Auto Cut field). • Increase the leakage current by changing the power setting until an audible alarm is also emitted. This should occur at 300…350 mA (accordingly 31.5…43 watts on a HF power meter at the above setting). ICC 350 AUTO CUT AUTO COAG 1 xxx ppp AUTO COAG 2 AUTO BIPOLAR HFL • ppp Set SOFT COAG power which can be changed during activation. • xxx Measurement value of the HF leakage current measurement. Standby Using the power setting in the AUTO COAG 1 field, set the HF leakage current flowing to ground at Ieff = 150 mA. This is not assigned for the ICC 200 and 300 since no HF leakage current monitor is available there. 90 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 10 HF leakage current measurement ICC AE APM 600 NE AE Potential equalization NE cable with pin short-circuit I HF leakage Art. No.: 80116-201 09 / 2004 3 m cable NE 1 TEST PROGRAMS AND ADJUSTMENTS 91 / 266 92 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 11 1 TEST PROGRAMS AND ADJUSTMENTS 93 / 266 Adjustment 11 Contact monitor Procedure • Call up Test program 16, Adjustment 11. • At the BIPOLAR output of the ICC, the ERBE bipolar Testbox for the bipolar automatic starter (EE 20100-017 ) or appropriate fixed resistors (1.2 kOhm and 2.5 kOhm with a capacity of 15 watts as well as 18 kOhm, 1 watt) is connected via the EE bipolar original cable. • With a resistance of 2.5 kOhm (socket 1–2), a value of 25 must be displayed in the AUTO CUT field. (Display = resistance divided by 100). The setting of the switch-on threshold with PT11 on the PCB control board (slot J3) proceeds in such a way that, at a load resistance of 2.5 kOhm, the display in the AUTO COAG 2 field changes from “OFF” to “ON”. • Now the short-circuiting monitor is set by connecting a 6 ohm resistor (capacity = 0.5 watts) to the BIPOLAR outlet. Then, the display »rLo« appears on the AUTO COAG 1 display. Using TP12 on the PCB control board J3, the display is set to a measurement value of 100 in the AUTO CUT display. • Testing the shutdown response: To do this, exit Test program 16 briefly by selecting Test program 0. The ICC operates in the normal mode. Switch on AUTO START 1. Set the bipolar power to 1 watt. The BIPOLAR outlet is connected to sockets 1 and 3 on the ERBE Testbox and thereby charged with 1.2 kOhm. The BIPOLAR generator must automatically be activated after the delay time. Now press pushbutton 1 on the Testbox. This raises the capacity resistance to 18 kOhm. The BIPOLAR generator must now shut down. • This test must be repeated at the power settings 20 watts, 40 watts, 50 watts (or without AAMI standard up to 120 watts). ICC 350 ICC 300 AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR uuu OFF br open output rda ON br loaded output iii rLo br loaded output ICC 200 AUTO CUT AUTO COAG uuu OFF open output rda ON loaded output 94 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 11 Art. No.: 80116-201 09 / 2004 Contact monitor • uuu Standby measurement value of the contact monitor at a preset bipolar power of 10 watts • rda Calculated contact resistance at activation [W/100] • iii Amplified output current at contact resistance < 1 kW • rLo Display if resistance measured at activation < 1 kW 1 TEST PROGRAMS AND ADJUSTMENTS 95 / 266 96 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 12 1 TEST PROGRAMS AND ADJUSTMENTS 97 / 266 Adjustment 12 Pulse/pause length ST output stage Procedure • Call up Test program 16, Adjustment 12. • Measure actuation impulse TSI_STE at measuring point MP 3 on ST output stage (slot J6) with the oscilloscope (measuring point MP1 = GND). • Using TP16, set this to a pulse length of 200 ns (±50 ns). IMPORTANT! The pulse time is measured at average amplitude, i.e. at approx. 7.5 volts level. ATTENTION! The pulse is inverted. • The repetition frequency at TP17 is set in such a way that the value 0 (tolerance 0...4) is displayed in the AUTO CUT field. • Now exit the test program and return the ICC to normal operating condition. • To check the performance, connect the HF output to the HF power meter, setting 500 ohms. • Activate the ICC using the blue footswitch pedal at the SPRAY and FORCED normal settings. The power output in watts should correspond to the display in the AUTO COAG 2 field. • Check whether the maximum emitted output power with SPRAY and FORCED is within the tolerance limits (120 W ± 15 %). If necessary, conform the pulse length to the PCB control board using TP16. TP17 must no longer be changed. ICC 350 ICC 300 AUTO CUT AUTO COAG 1 xxx ppp AUTO COAG 2 AUTO BIPOLAR tSt Standby ICC 200 AUTO CUT AUTO COAG xxx tSt Standby • ppp Set AUTO COAG 2 FORCED power • xxx Difference = Set frequency minus actual frequency 98 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment 12 Pulse/pause length ST output stage 5 V/Div 50 ns/Div Art. No.: 80116-201 09 / 2004 Fig. : Transistor switching pulse ST output stage 1 TEST PROGRAMS AND ADJUSTMENTS 99 / 266 100 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment 13 1 TEST PROGRAMS AND ADJUSTMENTS 101 / 266 Adjustment 13 LF leakage current monitor (ICC 350 only) Procedure • Call up Test program 16, Adjustment 13. • Set the jumper to the “capacitance grounded” operating mode (place jumper J3 on display board). • Perform adjustment using ERBE TESTBOX 2 or another 50 Hz sine-wave current source. • Between the neutral electrode output and the potential equalization, feed a 50 Hz sine-wave current of 45 µA (see Figure). • Using TP1 on the motherboard, set the leakage current monitor in such a way that the display in the AUTO CUT field changes just from 0 to 1 at 45 µAeff. Reset jumper to previous condition. ICC 350 AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR x I nF •x Standby x = 0 for LF leakage current < 50 µA x = 1 for LF leakage current > 50 µA. For adjustment, the test current must be fed according to the instructions. Adjustment 13 is not assigned on the ICC 300 and ICC 200. Measurement setup Battery-powered measurement unit only! INF ICC AE NE + ERBE Testbox 2 18 N LI PE 19 102 / 266 1 Power supply 110 V 115 V 230 V TEST PROGRAMS AND ADJUSTMENTS Adjustment 13 Art. No.: 80116-201 09 / 2004 LF leakage current monitor TP1 1 TEST PROGRAMS AND ADJUSTMENTS 103 / 266 104 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment of ICC 350 ZMK Neurotest Version V2.00 ICC 350 TUR Neurotest Version V2.00 1 TEST PROGRAMS AND ADJUSTMENTS 105 / 266 Adjustment of Neurotest board Neurotest board EE 30128-070 Jumper JP4 on the front panel is used to activate the display of the feedback frequency of output current measurement and display of the feedback frequency of the remote control are activated. ATTENTION On the ZMK version, there is a display only during activation and if the Neurotest circuit is closed. On the TUR version there is a display as soon as the NT LED lights up on the remote control. AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR SPH Intensity no. Frequency measurement Current measurement SPH: The Neurotest program is activated. Intensity no. Set intensity number is 1…5. It corresponds to the intensity number which has been set on the remote control. Frequency measurement Measurement of feedback frequency of the remote control. Current measurement Measurement of feedback frequency of the output current measurement. Setting the feedback frequency of output current measurement (trimming potentiometer TP 1: Setting the feedback frequency) The Neurotest board is isolated and actuated via optocoupler. The feedback frequency of the output current measurement also takes place via an optocoupler. The output current pulse is converted into a frequency. This frequency can be measured at test point MP7. Test point MP6 is reference ground. Test points MP6 and MP7 relate to the electronic circuitry of the ICC unit. Without activation, the feedback frequency is 0 Hz. After the pulse time, the feedback frequency is only available at MP7 for a brief period. Test setup At the Neurotest output, connect up a test resistor of 1 kOhm, 0.5 W and 1%. On the TUR version, the Neurotest output is between the neutral electrode and the CUT/COAG 2 output. The TUR version is activated with the yellow pedal of the dual-pedal footswitch. On the ZMK version the Neurotest output is between the neutral electrode and the Neurotest output. The ZMK version is activated with the ZMK fingerswitch. The setting is performed at intensity 3. For this setting the set feedback frequency must be adjusted to 73. If the electronic fuse trips, the display of feedback frequency is approx. 40. 106 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of Neurotest board Neurotest board EE 30128-070 AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR Current measurement Set Min. Max. SPH 1 52 42 75 SPH 2 91 81 100 SPH 3 (Set value 73) 73 63 83 SPH 4 64 54 74 SPH 5 59 49 69 ATTENTION! Don't forget to remove the jumper! Check the fusible link for correct rating F1: Microfuse FF 1/16 /125 V (62 mA), Wickmann Type 19278K High-voltage test The high-voltage test is conducted according to the specifications in the test record. Testing the activation signals The TUR version is activated with the yellow pedal of the double-pedal footswitch. The ZMK version is activated with the ZMK fingerswitch. Art. No.: 80116-201 09 / 2004 Performance test on the constant-current circuit A test resistor of 1k, 0.5W and 1% and a rotary potentiometer of 50k 0.3W are connected in series at the Neurotest output. Measure the square-wave voltage on the 1k test resistor. (1mA corresponds to 1V) The tolerance range of output currents is +25% to –25%. Larger deviations generate an output error display. 1 TEST PROGRAMS AND ADJUSTMENTS 107 / 266 Adjustment of Neurotest board Neurotest board EE 30128-070 Square-wave output peak current Control range of constant-current source SPH 1: 5 mA 0R…approx. 20 kOhm SPH 2: 10 mA 0R…approx. 10 kOhm SPH 3: 15 mA 0R…approx. 6 kOhm SPH 4: 20 mA 0R…approx. 5 kOhm SPH 5: 25 mA 0R…approx. 4 kOhm Testing the constant-current source Slowly set the rotary potentiometer higher from 0R. At a total resistance of approx. 6 kOhm, there is an output error display. At approx. 6 kOhm, the output current is constant. Performance test on output error monitoring. • At the Neurotest output connect a test resistor of 1 kOhm, 0.5 W and 1%. • Set SPH 1. • Activate the unit. When the circuit is interrupted there will be an output error message. Performance test on the electronic fuse The output current is monitored constantly. In the event of an excess dose, the electronic fuse trips and via longitudinal transistor T3 switches off the constant-current source supply voltage. The electronic fuse is monitored in the interval between the pulses. If the electronic fuse has tripped, this is indicated by the message ERROR 90 or ERROR 84. • To trip the electronic fuse: Activate the Neurotest function and briefly connect test point MP9 to MP2. The electronic fuse should respond. The microfuse must not trip. General information about the self-check Before activation, or when setting the intensity on the remote control, there is a check on the electronic fuse in two steps. 1. Briefly switch on transistor T1 and thus trip the electronic fuse. There is a message ERROR 90 or ERROR 84 if the electronic fuse has tripped. 2. Briefly switch on transistor T2 and thus reset the electronic fuse. There is a message if the electronic fuse has not been reset. 108 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of Neurotest board Neurotest board EE 30128-070 Activation test Art. No.: 80116-201 09 / 2004 Activation of the HF LED on the remote control takes place at intensity setting 0 using the rotary switch on PC board EE 30121-442. At an intensity setting of 1 to 5 the NT LED is actuated by the CPU and the HF LED must not light up. On the TUR version a check must be performed as to whether activation of the HF is inhibited when intensity of 1 ... 5 is set. On the ZMK version, activation of the HF is possible even if intensity 1 ... 5 has been set. 1 TEST PROGRAMS AND ADJUSTMENTS 109 / 266 110 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment of remote control for Neurotest 1 TEST PROGRAMS AND ADJUSTMENTS 111 / 266 Adjustment of remote control for Neurotest Neurotest board EE 30121-442 Setting the remote control for Neurotest board EE 30121-442 Jumper JP4 on the front panel is used to activate the display of the feedback frequency of output current measurement and display of the feedback frequency of the remote control are activated. AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR SPH Intensity no. Frequency measurement Current measurement ATTENTION! On the ZMK version, there is a display only during activation and if the Neurotest circuit is closed. On the TUR version there is a display as soon as the NT LED lights up on the remote control. SPH: The Neurotest program is activated. Intensity no. Set intensity number is 1…5. Corresponds to the intensity number which has been set on the remote control. Frequency measurement Measurement of feedback frequency of the remote control. Current measurement Measurement of feedback frequency of the output current measurement. Setting the feedback frequency for intensity setting (trimming potentiometer TP 1: Setting feedback frequency) The intensity setting is converted to a frequency. This frequency can be measured at Pin 1 AD654 on IC1. Test point MP6 is reference ground. Frequency is measured using a frequency meter. The setting takes place at intensity 5 - for this setting the set feedback frequency is adjusted to 38.0 Hz (–0.5 Hz, +0.0 Hz) on the frequency meter. AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR Frequency measurement Currency [Hz] Set Min. Max. Set Min. Max. SPH 1 7 5 10 200 180 215 SPH 2 14 11 20 105 80 120 SPH 3 (Set value 73) 24 21 28 62 57 67 SPH 4 32 29 36 45 43 49 SPH 5 38 37 60 38 37 40 112 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of remote control for Neurotest Neurotest board EE 30121-442 ATTENTION! Don’t forget to remove the jumper. Setting the feedback frequency for intensity adjustment can also be performed without the ICC unit by supplying +15 V to the remote control and measuring the feedback frequency using the frequency meter. High-voltage test The high-voltage test is performed using the specifications in the test record. Testing the LED display Art. No.: 80116-201 09 / 2004 Actuation of the HF LED is conducted at intensity setting 0 using the rotary switch PC board on EE 30121442. At an intensity setting of 1 to 5, the NT LED is actuated by the CPU and the HF LED must not light up. The NT LED only lights up when the feedback frequency is in the valid range. Check intensity setting 1…5. 1 TEST PROGRAMS AND ADJUSTMENTS 113 / 266 114 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Art. No.: 80116-201 09 / 2004 Adjustment of activation and instrument detection 1 TEST PROGRAMS AND ADJUSTMENTS 115 / 266 Adjustment of activation and instrument detection MIC board 30128-200 (V4.0) List of units involved ICC 350 MIC-MIEN V4.0 EE 10128-080 ICC 350 MIC-MIEN-DOKU V4.0 EE 10128-081 ICC 350 MIC-MIEN F V4.0 EE 10128-082 ICC 350 MIC-MIEN Int. V4.0 EE 10128-083 ICC 350 MIC-MIEN Int UL V4.0 EE 10128-215 ICC 350 MIC-MIEN Japan, 100V V4.0 EE 10128-310 Identification of the trimming potentiometers: Trimming potentiometer TP 1: setting the instrument detection. Trimming potentiometer TP 2: setting the activation detection. Valid instrument number Program no. Instrument Resistance Instrument no. 12 MIC TEM instrument EE 20191-275 10 Ohm ± 1 %; 0,2 W 1 13 MIEN Probe EE 20191-356 30 Ohm ± 1 %; 0,2 W 2 13 MIEN Probe EE 20191-357 30 Ohm ± 1 %; 0,2 W 2 The probes of no. 2 are only suitable for coagulation and CUT remains inhibited. Display of instrument number AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR Inr. Nr. p3 nd Inr. Instrument recognized No. Instrument number p3 Power setting AUTO COAG 2 –nd Compressed air valve for needle control is actuated (only MIC) nd Compressed air valve for needle control is not actuated (only MIC) 116 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of activation and instrument detection MIC board 30128-200 Setting the instrument detection • The setting takes place in program 12 MIC. • Connect a resistor of 51 R, ± 1% and 0.2W to the test line. ATTENTION! The original ERBE TEM connecting cable EE 20192-086 has a cable impedance of 1 Ohm per cable, which produces a series resistance of 2 Ohms for the instrument detection. In the line to and from the unit the instrument test line must have a series resistance of < 0.5 Ohm. Since on the V4.00 version only the TEM instrument no. 1 and MIEN probe no. 1 are connected up, it is sufficient to perform the balance only for these instruments. With jumper JP4 on the front panel the measurement display is activated. Measurement display AUTO CUT AUTO COAG 1 I measurement I no. I-measurement Measurement of instrument detection 0…255 I-No. Instrument number Using trimming potentiometer TP 1, set I measurement to 52 (resistance of 51 R ± 1%; 0.2 W). Art. No.: 80116-201 09 / 2004 Testing the instrument detection 1 Detection resistance Instrument no. 0R 0 0…2 10 R 1 3…20 30 R 2 21…45 51 R 3 set value 52 62 R 4 70…91 TEST PROGRAMS AND ADJUSTMENTS Valid range 117 / 266 Adjustment of activation and instrument detection MIC board 30128-200 Setting of activation detection Set the trimming potentiometer TP 2 to approximately the center position. ATTENTION! Never forget to remove jumper JP4. Test instructions for program 12 MIC • • Assignment of MIC output socket for the MIC program: Pin 1: NE 1 Pin 2: NE 2 not assigned Pin 3: CUT cutting function Pin 4: Instrument detection between Pin 1 and Pin 4 Pin 5: Activation detection between Pin 1 and Pin 5 Set and test instrument detection and activation detection: Test instrument detection together with the TEM instrument EE 20191-275 and connecting cable EE 20192-086 in the MIC program. • Connect up the compressed air supply: The MIC output socket is active in the MIC program. Connect up to the compressed air supply (max. 5 bar). Connect up 10 Ohm detection resistor corresponding to TEM instrument no. 1. • Test CUT function: The CUT function is activated with the yellow footswitch. MIC socket AUTO CUT APM P [Watt] NE1 CUT Effect 3 40 W 500 Ohm 40 ± 15 % ATTENTION! The measuring system will be damaged beyond repair if the HF lines are connected up to the APM incorrectly. 118 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of activation and instrument detection MIC board 30128-200 The output error display is activated at 40 W and 500 Ohm. Activation of the BIPOLAR CUT function is also possible without the neutral electrode. • Compressed air control At instrument 1 the compressed air valve is opened during CUT activation. The compressed air valve controls the needle of the TEM instrument. After activation the needle reset time elapses. After needle reset time has elapsed the compressed air valve closes and the needle is reset. Needle reset time is indicated in test program 23. Check the compressed air valve to make sure that it operates properly and to ensure there are no leaks. • Check monopolar coagulation Activation of the SOFT function and the FORCED function is performed using the blue footswitch. MIC socket NE1 ICC 350 NE Electrode AUTO COAG 2 APM P [Watt] SOFT 120 Watt 75 Ohm 120 ± 15 % FORCED 60 Watt 350 Ohm 60 ± 15 % Test instructions for program 13 MIEN • Art. No.: 80116-201 09 / 2004 • Assignment of the MIC output socket for the MIEN program Pin 1: NE 1 bipolar Pin 2: CUT and COAG function bipolar. (MIEN protective circuit). Pin 3: not assigned Pin 4: Instrument detection between Pin 1 and Pin 4 Pin 5: Activation detection between Pin 1 and Pin 5 Test instrument detection. Test instrument detection together with the MIEN probe EE 20191-305/308 and handlepiece EE 20191-306 in the MIEN program. • Test bipolar CUT function The CUT function is activated using the yellow footswitch. ATTENTION! The measuring system will be damaged beyond repair if the HF lines are connected up to the APM incorrectly. 1 TEST PROGRAMS AND ADJUSTMENTS 119 / 266 Adjustment of activation and instrument detection MIC board 30128-200 MIC socket AUTO COAG 2 APM P [Watt] NE1 CUT Effect 3 15 Watt 500 Ohm 15 ± 3 (W) The output error display is activated at 40 W and 500 Ohms. Activation of the bipolar CUT function is also possible without the neutral electrode. • Test bipolar SOFT coagulation The SOFT function is activated with the blue footswitch. • MIC socket AUTO COAG 2 APM P [Watt] NE1 CUT SOFT 15 Watt 500 Ohm No-load voltage 84 ± 5 Vp 7 ± 2 (W) Test the protective circuit with test program 18 In the event of an error, the protective circuit in the MIEN program prevents an overdose of HF voltage and HF current. If the output current is too high, the fusible link in the protective circuit trips. The test checks whether the correct fuse is inserted. The manufacturer of the fuse and the fuse rating can be found in the parts list. • Testing the voltage limitation with no load Activate test program 18. In the AUTO CUT display panel the set value of HF output voltage is displayed. With the CUT “Up/ Down” buttons, the HF output voltage can be adjusted in the range from 260Vp to 500 Vp (±50Vp). Connect oscilloscope to the MIC output socket NE1 and CUT. The highest HF peak voltage at the AUTO CUT Effect 3 (15 W) setting is 340 Vp. At this voltage the protective circuit must not yet impose any limitation. The protective circuit limits the output voltage from 360 Vp upward. Range in which the limitation must be activated: 360–450 Vp. At the setting of 499 Vp the fuse will not trip and the operability of the protective circuit remains intact. ATTENTION! As soon as the voltage limitation is activated, current flows through the protective diodes and the diodes heat up. The duration of the test from the moment of voltage limitation must not exceed 5 seconds or else the protective diodes break down and the circuit will have to be repaired. 120 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Adjustment of activation and instrument detection MIC board 30128-200 Voltage limitation at setting of 415 V p. ATTENTION! The test duration must not exceed 5 seconds! Voltage limitation at setting of 499 V p. Art. No.: 80116-201 09 / 2004 ATTENTION! The test duration must not exceed 5 seconds! 1 TEST PROGRAMS AND ADJUSTMENTS 121 / 266 122 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 17 Brightness setting of the 7-segment displays General description Using this program, you can adapt the brightness of the 7-segment displays in 10 stages to the lighting conditions of the room. After starting the test program, you will see the following display: AUTO CUT AUTO COAG 1 Int xx AUTO COAG 2 AUTO BIPOLAR • Int Intensity (brightness) of the displays • xx Present intensity, adjustable from 1...10. You can make the intensity brighter using the “Up” (8) key or darker using the “Down” (9) key. Art. No.: 80116-201 09 / 2004 After termination of the test program, store the brightness setting with key 3. 1 TEST PROGRAMS AND ADJUSTMENTS 123 / 266 Test program no. 23 Changing the delay time with AUTO START General description Using this program, you can change the specifications for the delay time when activating AUTO START. The delay time is the time which passes after the forceps contacted the tissue and the HF generator is actuated. So that the operating surgeon can know whether the forceps have contacted the tissue, the AUTO BIPOLAR activation display (blue triangle in the AUTO-BIPOLAR field) switches on at contact. Then the delay time starts. After the delay time has passed, the HF generator and the activation tone are switched on. In case of error in the memory medium, the following basic settings have been preset: ICC 350 and ICC 300: ICC 200: AUTO START 0: 0 seconds, AUTO START 1: 0.5 seconds, AUTO START 2: 1 second; AUTO START: 0.5 seconds. After starting Test program 23, you will see the following display: AUTO CUT AUTO COAG 1 SEt Up AUTO COAG 2 AUTO BIPOLAR tt.t Time setting Possible from 0.1 to 10 seconds in the following time steps: from 0.1 to 2.0 seconds in 0.1 seconds steps from 2.0 to 10.0 seconds in 0.5 seconds steps. Procedure for ICC 350 AUTO START Setting range 0 0 greater than/equal to t greater than/equal to 1 1 1 greater than/equal to t greater than/equal to 2 2 2 greater than/equal to t greater than/equal to 10 seconds You can set and store the delay time for every user-specific program 0 to 9 and for every AUTO-START time (0, 1 and 2). Since the AUTO-START time 0 can be no longer than AUTO-START time 1, it is best to proceed from the longest time for AUTO START 2 and then set the times for AUTO START 1 and AUTO START 0. 124 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Test program no. 23 Changing the delay time for AUTO START NOTE You will find the assignment of keys with the numbers given below on pages 1-4 (Calling up of the test program mode) of this Service Manual. 1. Using key 2 Set program number 2. Using key 14 Set AUTO START 2 3. Using “Up” or “Down” key Set the required time 4. Using key 14 Set AUTO START 1 5. Using “Up” or “Down” key Set the required time 6. Using key 14 Set AUTO START 0 7. Using the “Up” or “Down” key Set the required time 8. Using key 1 Store the set values. Steps 1 to 8 can be repeated individually for every required program. Then exit the test program using key 3. Procedure for ICC 300 AUTO START Setting range 0 0 greater than/equal to t greater than/equal to 1 1 1 greater than/equal to t greater than/equal to 2 2 2 greater than/equal to t greater than/equal to 10 seconds Art. No.: 80116-201 09 / 2004 For every AUTO START time (0, 1 and 2), you can set and store a delay time. Since the AUTO-START time 0 cannot be any longer than the AUTO-START time 1, it is best to proceed from the longest time for AUTO START 2 and then set the times for AUTO START 1 and AUTO START 0. 1. Using key 14 Set AUTO START 2 2. Using the “Up” or “Down” key Set the required time 3. Using key 14 Set AUTO START 1 4. Using the “Up” or “Down” key Set the required time 5. Using key 14 Set AUTO START 0 6. Using the “Up” or “Down” key Set the required time 7. Using key 3 Exit the test program and the set values are stored. 1 TEST PROGRAMS AND ADJUSTMENTS 125 / 266 Test program no. 23 Changing the delay time for AUTO START Procedure for ICC 200 AUTO CUT AUTO COAG 1 SEt Up AUTO COAG 2 AUTO BIPOLAR tt.t For the AUTO START function, you can set and store a delay time. 1. Using the “Up” or “Down” key Set the required time 2. Using key 3 The set values are stored and the test program is exited. 126 / 266 1 TEST PROGRAMS AND ADJUSTMENTS Chapter 2 ERROR list ERROR list V 4.X ERBOTOM ICC 350 (V4.0, V2.0), ICC 300 (V3.0), ICC 200 (V2.0) Automatic error detection, indication and documentation ERBOTOM ICC series high-frequency surgical units are equipped with a device for automatic error detection, indication and documentation (ERROR monitor). Error detection, indication, documentation For ERBOTOM ICC series equipment as of software version 2.0 / 4.0, the ERROR monitor can, depending on the type of equipment and its outfit, detect up to 91 currently occurring errors (ERROR) and indicate them on the display. Error numbers (ERROR nos.) are assigned to the various errors. If an error is detected, it is immediately reported. The error report is both visual and audible. The error numbers of detected errors are automatically stored chronologically. Since only 10 memory locations are available, only the last 10 error messages are displayed. If the same error is detected several times in a row, the corresponding error number is then saved only once in consideration of the limited number of available memory locations. The error numbers documented in memory can be displayed via Test program 2 and deleted. Troubleshooting for ICC family equipment The ICC unit family is equipped with an error detection system which detects and stores the last 10 errors detected in an ERROR list. This error memory can be called up via Test program no. 2. The user should thus be capable of localizing errors himself and deciding whether this is an operating error or an error in the accessories, which he can possibly eliminate himself, or whether it is necessary to make use of the technical service. If there is a complete failure of the system and no display is visible, the power supply may have been interrupted or the voltage supply inside the unit is defective. In such a case, first check whether the outlet used is live or a fuse in the house power supply has been tripped (Does a different unit function at this outlet?). If the outlet used is live, check the powerline to the unit and replace if necessary. The equipment fuses on the rear panel should also be checked and replaced if necessary. ATTENTION! Art. No.: 80116-201 09 / 2004 Only use original fuses of the same specification. If these efforts bring no results, there is probably an error within the unit. You should then contact the technical service. For a malfunction with a properly functioning display but with no indication of an ERROR number in the display, the error may be located in defective accessories. It is possible, for example, that there may be a defect in the fingerswitch or footswitch, or a disruption in the associated connecting cable. The cause of the error may be determined by exchanging the accessories used. To determine other causes of errors, an ERROR number in the unit display indicates the course of further action according to the following table. 2 ERROR LIST 129 / 266 ERROR no. 1–13 Error no. Designation and remedies No HF voltage present at the HF voltage sensor. Error in the HF generator. 1 Short circuit in accessories: Replace accessories. Other equipment error: Technical Service. 2 HF output voltage too high, error in the HF generator. Equipment error: Technical Service. The switched-mode power supply unit supplies no voltage during activation, error in the 3 switched-mode power supply unit. Equipment error: Technical Service. The switched-mode power supply unit supplies too high a voltage upon activation of the ST 4 generator, error in the switched-mode power supply unit. Equipment error: Technical Service. LF leakage current is > 50 µA and flows into the unit via the neutral electrode. Check positioning of the patient, whether there is contact with the infusion stand or the like. 5 Other defective equipment connected to the patient? Are the potential equalization and grounded conductor OK? 6 During the activation phase, the safety shutoff feature output reports "ON". Equipment error: Technical Service. 7 During the activation phase, the safety shutoff feature output reports "OFF". Equipment error: Technical Service. 8 not assigned Maximum continuous time limit exceeded. 9 Only activate the unit if necessary. The time limit monitor is a safety feature and should generally only be increased with a strict indication using Test program 10 in the setup. 10 Error during activation of the AUTO CUT, no valid front panel setting. Confirm control panel by pressing a key. Select required power setting. 11 Error during activation of AUTO COAG 1 or AUTO COAG 2, no valid front panel setting. Confirm control panel by pressing a key. Select required power setting. 12 Error during activation of AUTO BIPOLAR, no valid front panel setting. Confirm control panel by pressing a key. Select required power setting. Error during activation of AUTO CUT: - NESSY: measured NE impedance is > 120 ohms. - Using Test program no. 7, split electrodes were set: NE impedance < 10 ohms. 13 Check NE cable. Check NE contact surface: Short circuit? Is NE stuck to metal? If necessary, set required neutral electrode using Test program 7. 130 / 266 2 ERROR LIST ERROR no. 14–22 Error no. Designation and remedies 14 (not assigned) 15 (not assigned) 16 (not assigned Error during activation. HF leakage current > 300 mA. 17 Check position of the patient: Contact points with infusion stand or the like. Otherwise equipment defect: Technical Service. Error during activation. 150 mA < HF leakage current < 300 mA. 18 Check position of the patient . Eliminate contact points with infusion stand or the like. Otherwise equipment defect: Technical Service. Error during activation of AUTO CUT and AUTO COAG: NESSY current density error. Check NE cable for interruption. 19 Check contact surface and application point of the NE. Otherwise equipment defect: Technical Service. For AUTO CUT and AUTO COAG: NESSY current symmetry error. Variably high current flowing into the joint phases of the NE. 20 Check cable to the NE (interruption). Check NE contact surface. Art. No.: 80116-201 09 / 2004 21 Current symmetry error. See ERROR 20. When switching on the power, AUTO CUT is switched on. Activate unit only after switching on power. Check fingerswitch and footswitch as to whether a 22 key or pedal is stuck or the switch is defective. Otherwise equipment defect: Technical Service. 2 ERROR LIST 131 / 266 ERROR no. 23–33 Error no. Designation and remedies Switch on the power, AUTO COAG 1 is switched on. Activate unit only after switching on power. Check fingerswitch and footswitch as to whether 23 key or pedal is stuck or switch is defective. Otherwise equipment defect: Technical Service. When switching on the power, AUTO COAG 2 is switched on. Activate unit only after switching on power. Check fingerswitch and footswitch as to whether 24 key or pedal is stuck or switch is defective. Otherwise equipment defect: Technical Service. When switching on the power, AUTO BIPOLAR is switched on by footswitch. Activate unit only after switching on power. Check footswitch as to whether key or pedal is 25 stuck or switch is defective. Otherwise equipment defect: Technical Service. Contact is detected when switching on the power. Contact monitor is active. Check the forceps connecting cable or check forceps for a short circuit. The forceps tips are 26 touching or lying on a conductive base: Isolate forceps. Otherwise equipment defect: Technical Service. Overheating! Internal unit temperature > 100°C. Permissible output power is reduced. Unit generated max. power for a longer period of time. 27 Allow unit to cool down. Coagulation electrode too large? Short circuit or error in accessories? Activation signal for the blue footswitch button already on. Is the blue footswitch button depressed? Is the button or switch stuck? If necessary, briefly 28 unplug the footswitch as a test. First preselect footswitch on the front panel and then switch on. For Spanish version: 29 During activation, a further activation signal is detected. Double activation not permissible. 30 Mismatch! Over a time period > 5 sec , the load resistance is < 50 ohms. Check accessories for short circuit. Mismatch! The output power is > 100 watts. During activation, the load resistance remains 31 constant and < 300 ohms. After a prescribed time, ERROR 31 appears. Check accessories for short circuit. Multiple activation detected. 32 No simultaneous activation via several sources. If unsuccessful, unit is then defective. Technical Service. 33 132 / 266 At the end of activation, a new activation signal immediately appears. No simultaneous activation via several sources. 2 ERROR LIST ERROR no. 34–48 Error no. Designation and remedies 34 Multiple activation detected during AUTO BIPOLAR . No simultaneous activation via several sources. There is already a new activation signal during AUTO BIPOLAR with AUTO STOP or AUTO 35 START. No simultaneous activation via several sources. When pressing the BIPOLAR AUTO START key, there is already an AUTO START signal . The contact monitor is activated. 36 see ERROR no. 26. Otherwise equipment defect: Technical Service. Error during activation. 37 At the point in time of activation, the power supply unit voltage has not yet dissipated. Power supply discharge faulty. Equipment defect: Technical Service. 38 During AUTO START activation, the contact resistance is < 6 ohms. Inspection of the forceps and supply cable for short circuit. Art. No.: 80116-201 09 / 2004 39 not assigned 40 Monitor ST generator time control. Output error: ST time control for FORCE and SPRAY. Actual value > set value plus 20%: Technical Service necessary. 41 Like Error 40, but Actual value < set value minus 20%: Technical Service necessary. 42 Like Error 41, but Actual value > set value minus 40%: Technical Service necessary. 43 Monitor of ST generator time control. Output error. No frequency feedback: Equipment defect: Technical Service. 44 Monitor of the ST generator output voltage. Output error: Equipment defect: Technical Service. 45 HF generator error during self-check. HF output voltage too low : Equipment defect: Technical Service. Self-check. 46 Error within the permissible limits during comparison of the power supply unit voltage with the HF output voltage. Equipment defect: Technical Service. HF generator error during self-check. 47 Like Error 46, but error outside permissible limits. Equipment defect: Technical Service. Patient current. 48 No signal from the output current monitor. Equipment defect: Technical Service. 2 ERROR LIST 133 / 266 ERROR no. 49–82 Error no. Designation and remedies 49 not assigned A key on the front panel is depressed. 50 Operating field key is depressed or defective during the power start-up phase. If it cannot be to 70 corrected, then equipment defect: Technical Service. 71 Interface error for ICC 350 DOKU: Start or stop bit error or number of bits incorrect. Equipment defect: Technical Service. 72 Interface error for ICC 350 DOKU: Signal in receiving register has not been read out. Equipment defect: Technical Service. 73 Interface error for ICC 350 DOKU: Parity sign placed incorrectly. Equipment defect: Technical Service. 74 Interface error for ICC 350 DOKU: No connection to PC available. Equipment defect: Technical Service. 75 Interface error for ICC 350 DOKU: Sign stays in transmitter buffer. SIO module not transmitting. Equipment defect: Technical Service. 76 Interface error for ICC 350 DOKU: Interface storage takes too long; hard disk is too slow. Equipment defect: Technical Service. 77 not assigned to 79 ICC 350 NEUROTEST: No valid frequency for the 5-stage intensity setting. 80 Replace remote control. Otherwise equipment defect: Technical Service. ICC 350 NEUROTEST: The intensity setting was set to 0 during activation. 81 Do not set anything during activation. Otherwise equipment defect: Technical Service. ICC 350 NEUROTEST: NESSY measurement: NE impedance > 120 ohms. 82 Test the neutral electrode and supply line or position of the NE on the patient. Otherwise equipment defect: Technical Service. 134 / 266 2 ERROR LIST ERROR no. 83–91 Error no. Designation and remedies 83 ICC 350 NEUROTEST: Output current too high, but still within the permissible limits. Equipment defect: Technical Service. 84 ICC 350 NEUROTEST: Output current too high; outside permissible limits. Equipment defect: Technical Service. ICC 350 NEUROTEST: No output current. Interruption of the circuit or failure of the frequency feedback system. 85 Check the neurotest cable supply lines or the handle, NE and cable and replace if necessary. Otherwise equipment defect: Technical Service. ICC 350 NEUROTEST: Output current too low, but within the permissible limits. Check the neurotest cable supply lines, or the handle, NE and cable, and replace if 86 necessary. Otherwise equipment defect: Technical Service. ICC 350 NEUROTEST: Output current too low; current is below the permissible limit. 87 Check neurotest cable. Otherwise equipment defect: Technical Service. 88 ICC 350 NEUROTEST: Max. time limit has run out. The time limit monitor is a safety measure. Only activate unit if necessary. 89 ICC 350 NEUROTEST: When switching on the power, already a neurotest activation signal. Equipment defect: Technical Service. 90 ICC 350 NEUROTEST: Electronic fuse triggered or frequency feedback system has failed. Equipment defect: Technical Service. Art. No.: 80116-201 09 / 2004 ICC 350 NEUROTEST: After switching on the neurotest function using the intensity adjuster, a test determined that the electronic fuse was not triggered or the frequency feedback system 91 has failed. Equipment defect: Technical Service. 2 ERROR LIST 135/ 266 136 / 266 2 ERROR LIST Chapter 3 Circuit description Motherboard The following functions are also found on the motherboard: • Starting current limitation • Supply voltage changeover and power rectification • Power transformer for low voltage supply • Rectifier for low voltage • Chipselect generation and level adaptation of TTL level to 15 volt level for CMOS components. • Generation of the external control bus and of signal lines from the data from PIO outputs • HF leakage current measurement • HF leakage current limitation • Changeover between floating and capacitance-grounded output • Input circuit for the footswitch • Various level adaptations. The motherboard detects the other PCBs via connectors and contacts them. Starting current limitation The supply voltage moves from the power supply to the motherboard via the connector J 11. Immediately after switching on the ICC, the supply unit capacitors are charged which causes a heavy power surge by which, without protective measures, the fuses for the in-house electrical system would be triggered. Therefore a starting current limitation has been realized on the motherboard which limits the current peak to noncritical values after switching on. The corresponding power current first flows into the ICC via the resistor R5 and the fuse F1. The relay contacts REL 1 are still briefly opened. Power current is therefore temporarily limited to noncritical values due to resistor R5. Art. No.: 80116-201 09 / 2004 As soon as the 24 volt supply voltage is available, relay REL 1 can pick up, bridges resistor R5 and fuse F1 with its relay contacts, and relieves both of them. This short span of time is sufficient to effectively limit the starting power surge. LED D2 lights red when the relay REL 1 is actuated and thus serves as a control. Supply voltage switchover and power rectification The unit can be changed over either to the 230 volt or 115 volt supply voltage range. The remaining voltage deviations within the specification are offset by the controlled power supply units. The supply voltage can be switched over by shifting the connectors J 16 to J 22. In the 230 volt range, the bridge-connected rectifier BR1 functions as intended as a true bridge circuit. The wire bridges must be connected as follows: 3 CIRCUIT DESCRIPTION 139 / 266 Motherboard J 15 free J 16–J 20 grey J 17–J 21 brown J 18–J 22 yellow J 19 free In the 115 volt range, the bridge-connected rectifier BR1 operates with the electrolyte capacitors C6, C7 as a voltage doubler. The wire bridges must be connected as follows: J 15–J 20 grey J 16 free J 17 free J 18–J 21 brown J 19–J 22 yellow For the low voltage supply, there is a transformer TR 1 with rectifier BR2 and filter capacitor C15 on the motherboard. Here an unregulated DC voltage is provided in the 24 volt range. Since data are present on the databus for all parts of the circuit simultaneously, it is necessary to separately determine for which part of the circuit the currently output data is intended. This is realized by the “Chipselect method” by which the chip to be addressed is selected and addressed using a special “Chipselect signal.” This signal activates only one among a number of addressable modules. These signals are generated within the Multiplexer IC 4 and converted in the transistor arrays IC10 and IC11 to 15 volt CMOS level. The PIO (Parallel Input Output module) produces data in a brief period of time for many different target assemblies. While the data are only present briefly at the PIOs, the data for target assemblies should be present longer. For this an independent external control bus and independent control lines are used. The data for the signal lines are stored in the D-flipflops IC2 and IC3 and brought to the 15 volt CMOS level in the transistor arrays IC8 and IC9. For the external control bus, the PIO data only need to be brought to the 15 volt CMOS level in IC7. Limitation of the high frequency leakage currents High frequency leakage currents are effectively limited in the ICC. The transformer UE1 is used for limitation. All lines which lead to a high-frequency output socket on the ICC are directed via transformer UE1. If no high frequency leakage currents occur, the HF current flows from the generator via the patient to the neutral electrode and via the transformer UE1 back to the generator completely. Therefore ideally, the current flowing away is equal to the current flowing back. The windings of the transformer UE1 are switched in such a way that the resulting magnetic field is canceled by the current flowing back and forth. Thus the windings of this transformer have no inductivity; the current can flow unimpeded. However, if high-frequency leakage currents do occur within the patient circuit, the current flowing back and forth is generally not equal. The magnetic fields in the transformer UE1 do not cancel each other out; 140 / 266 3 CIRCUIT DESCRIPTION Motherboard an inductivity of the coils results which limits the high-frequency leakage current with this inductive impedance. Monitoring the high-frequency leakage currents As intended, the high-frequency current should only be used for cutting or coagulating tissue. To do this, it must flow to the active electrode in a small area and with a high current density, and flow back again from the neutral electrode over a large area and with a low current density. However, if the body of the patient is in contact with another electrically conductive object, the current may also take an undesirable path and, for example, cause a burn there. These undesirable currents are known as “leakage currents”. It is therefore important to know whether such a leakage current is flowing and how large it is. Such leakage current cannot simply disappear, but must instead always flow back to the generator. The largest proportion of these high-frequency leakage currents flow back to the generator via the power cable and the grounded conductor. Since all power lines and the grounded conductor are directed through the ring core of the coil L1, a corresponding high frequency voltage is induced if HF leakage current is present in the coil L1, which is rectified with diode D1, restricted with D6, D7 and smoothed in capacitor C13. For further processing, this DC voltage is fed to the processor system via the isolation amplifier IC12. Changeover between flowing and capacitance-grounded output High-frequency surgical units are generally available either in “capacitance ground of the neutral electrode” or “floating neutral electrode” connection systems, whereby no components are integrated between the connection to the neutral electrode and chassis in the latter connection system. Both connection systems have advantages and disadvantages. The advantage of capacitance ground is that the feed line from the neutral electrode to the patient is grounded at a high frequency via the capacitor and the risk of burns is reduced. However, it is a disadvantage that impermissible low-frequency leakage currents may flow through this capacitor during cardiac operations. Art. No.: 80116-201 09 / 2004 If the neutral electrode is operated as floating, on the other hand, the low-frequency leakage currents can be kept very easily below the limit value of 10 or 50 mA during cardiac operations, but the risk of burns is increased in this connection system since the line from the neutral electrode is about half the high frequency voltage of the generator. With the ICC high-frequency surgical units, the low-frequency leakage current to the patient is measured. At the first malfunction, this must not exceed 50 mA. Once this condition is ensured, the unit is permitted to carry the CF designation (Cardiac Floating). If the possible low-frequency leakage current is under 500 mA in the first case of malfunction, the unit is therefore not suitable for operations on the heart and has the designation BF (Body Floating). Initially the ICC is capacitance-grounded via capacitors C30 and C31 and the relay contact REL 2. The advantages of capacitance ground are fully exploited. The low-frequency leakage current is measured via the prescribed simulation R25, C28. If for any reason a low-frequency leakage current should appear, it is then evaluated. If it exceeds the limit of 50 mA, the relay contacts REL 2 are then opened and thus a lowfrequency leakage current can no longer flow. The ICC thus fulfills the CF requirement for cardiac surgery 3 CIRCUIT DESCRIPTION 141 / 266 Motherboard in every situation. The voltage occurring in the simulation is proportional to the current and is compared in the operation amplifier IC14 functioning as a comparator to the maximum permissible value that is prescribed and adjustable via the resistor divider R22 and TP1. The signal for switching over the relay REL 2 is present at the BF / CF output. Footswitch input circuit The footswitch is operated at a DC voltage of 15 volts via a multipole line. Since the footswitch connection, due to its length of up to several meters, can also function as a receiving antenna and absorb interferences, an RC low-pass is connected directly to the input sockets of the ICC which severely dampens high interference frequencies. The footswitch signals are then regenerated using the buffer IC 13. For further processing in the processor, the output signals from IC 13 are adapted to the TTL level of the processor. To do this, the noninverting buffer IC5 is used. Further signals are converted in the same manner from 15 volt CMOS level to the TTL level in the buffers IC1 and IC6. 142 / 266 3 CIRCUIT DESCRIPTION CPU board Slot J1 The following functions are located on the PCB: • The CPU with RAM and EPROM • The clock generator • The voltage supply monitor • The digital input and output via Parallel Input/Output modules (PIO) • Analog inputs via an A/D converter • The Chipselect generation • The safety interlock signal for controlling the activation signals. As the central processing unit (CPU), the CMOS microprocessor Z84 C00 (IC1) is used together with the EPROM 27 C 512 as the program memory (IC3) and the battery-buffered RAM 5864 as the main memory and constant memory (IC2) The clock pulse for operation of the computer is produced in the quartz clock generator IC16 and then processed in the two D-flipflops IC13 to a half-frequency, counterphase clock. In case of a breakdown of the supply voltage, the current computer data must still be “saved” and stored in the battery-buffered RAM. All these tasks are supported by the supervisor circuit IC10 (MAX 691). The supply voltage is monitored via the resistor voltage divider R3, R4 and the “Powerfail” input (Pin 9, IC10). The data are buffered by a 3 volt lithium battery BT1 which is connected at Pin 1 of the IC10. The circuit also monitors the voltage of this buffer battery. When switching on, the circuit affects a reset of the computer system to a specific initial status and provides the monitoring and functional capability through an integrated “watchdog” circuit. In addition, the +5 volt supply voltage is also monitored in a separate circuit via resistor R9, diode D1, buffer capacitor C13 and resistor R7 via the PIO IC6, Pin 27. The digital inputs and outputs of the computer are taken care of by the Parallel Input/Output circuits (PIOs, IC4 to IC7). The input and output ports are specified and connected by the program. Art. No.: 80116-201 09 / 2004 Analog dimensions, processed by the processor, move via the level adaptation (resistor network RN1, resistors R15 to R18) and simultaneous low-pass (capacitors C16 to C19) to the 4-channel analog-digital converter IC14, from whence the data are available to the processor. Since all system data are present together at the databus, the system must be able to address the target modules to which the data apply. This occurs in a processor system by means of the Chipselect lines by which very specific modules can be addressed via the assistance of “selection signals”. The Chipselect signals are created in the decoder IC9 from the addresses A3, A4 and A5. Depending on the address, only one output line each is switched to logical low. All signals from the various fingerswitches and footswitches are summarized and verified in a safety interlock signal as to whether any impermissible overlappings or impermissible conditions are produced. If no impermissible overlappings are determined, the safety interlock signal generates a signal which identifies the passed on data as save. This logic is accepted by the programmable controller IC17. 3 CIRCUIT DESCRIPTION 143 / 266 Low voltage supply Slot J2 The following assemblies are located on the PCB: • Voltage regulator for +24 volts • Voltage regulator for +15 volts • Voltage regulator for +5 volts • Voltage regulator for –15 volts • Three sound generators for the acoustic signals • Circuit for tone selection • Tone output amplifier with volume control. Voltage regulator for +24 volts The unstabilized DC voltage, gained on the motherboard via transformer TR1 and bridge-connected rectifier BR2, moves to the input of a switched-mode power supply unit. This consists of the integrated switching controller IC3, the memory choke L1 and the free-wheeling diode D1 with the necessary wiring. The output voltage is adjusted via the voltage divider R22, R23. At the output of the switching controller, a stabilized DC voltage of +24 volts is available. The presence of this voltage is indicated by the LED6. This voltage is mainly used to operate the relays in the surgical unit. Voltage regulation for +15 volts The instable input voltage, the presence of which is indicated by LED 4, moves to the switching controller IC 1. The circuit extensively corresponds to the +24 volt regulation, however the transformer UE 1 is used here as the memory choke which simultaneously taps a part of the connector voltage occurring there for the operation of the – 15 volt regulation. The output voltage of 15 volts prescribed by the divider ratio of the resistors R30 and R31 is used to operate the CMOS circuits and the operation amplifier. Its proper presence is signaled by the LED 2. Voltage regulation for – 15 volts The negative operation voltage of – 15 volts is mainly required for the negative voltage supply of the operation amplifier. Since the capacity of this voltage source is just minimal due to the circuit, a simple regulating circuit could be used. The principle of analog regulation is thus sufficient, and the resulting losses are minimal. The switched-mode voltage tapped from the switched-mode power unit for + 15 volts at transformer UE 1 is rectified through the diode D6 such that a negative DC voltage is present at the input of the analog regulator IC10. This voltage is stabilized by the fixed voltage controller IC10 to –15 volts. The proper presence of this voltage is indicated by the LED1. 144/ 266 3 CIRCUIT DESCRIPTION Low voltage supply Slot J2 Voltage regulation for +5 volts A controlled voltage of +5 volts is mainly required to operate the CPU, the TTL logic modules and the light displays on the front panel. Since the capacity of this voltage source is relatively high, a switched-mode power supply unit was used. The circuit corresponds extensively to that of the +24 volt regulator: The instable input voltage is stabilized to +5 volts by means of the regulator IC6. The proper presence of the output voltage is indicated by the LED3. From Pin 3 of the integrated switching controller IC1 of the +15 volt voltage regulation, a connection leads to the transistor T2 of the +5 volt control. In this way it is possible to block the function of the +5 volt power supply unit as long as the +15 volt supply is not available. This measure is used to increase the functional security of the unit. Tone generators for the signal tones The tone generators are used to audibly signal all operating and danger conditions when operating the surgical unit. To do this, three tone generators are available, the signals of which may be mixed with one another to produce pleasant and differing tones in this way. The timer IC4 produces the tone frequency for the first tone, which can be adjusted using the trim potentiometer TP2 at 493 Hz. Timer IC5 produces the tone frequency for the second tone, which can be adjusted using the trim potentiometer TP3 at 414 Hz. Timer IC7 produces the tone frequency for the third tone, which can be adjusted using the trim potentiometer TP4 at 329 Hz. The generated tone frequencies can now be switched on selectively using the analog switches on the IC8 and mixed with one another. The combination of individual tones is prescribed by the program and is selected using the D-flipflops of the IC9 as a target memory and switched through using the analog switches of the IC8. Via resistors R5, R7, R9, R24, R10 and R16, the tone frequencies are combined so that one sound can result from several individual frequencies. Art. No.: 80116-201 09 / 2004 The volume of the operating tones can be adjusted using a potentiometer which is connected in parallel to resistor R11. The volume of the alarms must not be reduced. For this reason, the reduction of amplitudes by means of the integrated analog switch IC8, Pin 10-11, which is also controlled by the CPU, can be passed by so that the tone signal in this case is reproduced with the maximum amplitude at the tone output amplifier IC 2. The R37, C9, C10, C11, R39 network is used for sound shaping, so that a pleasant sound results in the loudspeaker which follows the tone amplifier. 3 CIRCUIT DESCRIPTION 145 / 266 Control board Slot J3 The following assemblies are found on the PCB: • Measured value acquisition and adjustment • The contact monitor • Actuation and power setting of the ST output stage • Actuation of the power module • Synchronization of the QK output stage • Hardware electronic safety circuits • Spark control • Actuation of the QK output stage. Measured value acquisition and adjustment The measurement signals, which are triggered mainly to the Senso-board as well as to other parts of the entire unit, move first to the control board where they usually must still be adjusted in order to finally move on to the processor. For most inputs, an input circuit consists of a variable voltage divider with which the signal voltages can be adjusted. Various signal voltages, the values of which are needed very quickly by the processor system, proceed via the amplifiers IC1 and IC2 directly to the processor. (See diagram page 2/3). Other signals which are not required for fast processing can be fed to the processor system in multiplex operation. (Circuit diagram page 3/3). These signals are fed to the 16-channel multiplex IC 3, scanned in chronological order, then amplified in the operation amplifier IC1 and only then fed one after another to the processor system (output ANALOG 4). The individual operating voltages, for example, are determined in this way: The +15 volt operating voltage is fed via the resistor divider R39, R40 to the multiplexer. The +24 volt operating voltage is fed via the resistor divider R41, R42 to the multiplexer. The –15 volt operating voltage is first fed via R31 to the operation amplifier IC2 by inverting it. Now the voltage can also be processed as a positive parameter via the multiplexer which only switches through positive signals. The multiplexer IC3 receives its address actuation A0 to A3 from the control bus via the target memory (Dflipflop) IC19. The contact monitor In the bipolar operating mode, it is necessary that the generator be switched on via the forceps when biological tissue is found between the forceps tips. This is the purpose of the contact monitor. It should switch on the generator at a tissue impedance of 2.5 kOhm. In principle, two starting points can be specified and adjusted. The appropriate valid area is prescribed by the control bus, stored in target memory IC20 and switched through there according to the activated output (BER_1 or BER_2). 146 / 266 3 CIRCUIT DESCRIPTION Control board Slot J3 For example, if area 1 is activated, the emitter from transistor T2 is set high and gives its output voltage via the trim potentiometer TP 11, resistor R45 and diode D2 to the measurement line U_NETZT, which also leads at the power module to the sensor line of the switched-mode power supply's output voltage, but at the same time also to the measurement system of the processor (trim potentiometer TP1 on the control board). Transistor T2 can therefore be regarded as an extra-low voltage power supply, the output voltage of which the HF generator of the power module uses to produce a minimal HF voltage and emit this as a test voltage to the bipolar socket. The internal impedance of this mini power supply unit is adjusted via the trim potentiometer TP11. If the generator is now loaded with the tissue in the forceps (or with a 2.5 kOhm impedance), the supply voltage at the internal impedance of the mini power supply unit collapses by a specific amount. This voltage collapse is measured by the processor system and compared with the prescribed set values. If they agree, the main power supply unit is switched on and the HF generator supplies the preset power. The mini power supply unit cannot be fed in reverse due to the diode D2 (protective diode). Since the internal impedance can be changed via the trim potentiometer TP11, the starting point of the contact monitor can be adjusted here relative to the loaded impedance of the generator (tissue impendance). Actuation and power setting of the ST output stage The instruction to actuate the ST output stage arrives as a digital word from the control bus. From this, in the digital-analog converter IC8, a DC voltage results which is transformed into a specific frequency in the voltage frequency converter IC15, which can be adjusted using the trim potentiometer TP17. The clock pulse generated in this way is the repetition frequency of the ST output stage actuation. The pulse length of each individual actuation pulse is taken from the repetition frequency. Using the EXOR of the IC12, a monoflop is realized with which the pulse length of the actuation pulse can be adjusted using the trim potentiometer TP16. After a steepening of the edge, the actuation pulse TSI_STE is available at output 11 of the EXOR IC12. The generator power can be adjusted via the repetition frequency. Art. No.: 80116-201 09 / 2004 Actuation of the power module The power generator of the power module is a feedback generator in principle which receives its actuation pulse from the control board. The generator, however, does not begin to oscillate itself, but must instead be started by a pulse. The circuit receives the start-up signal and thus the necessary starting pulse from the processor via its PIO on the CPU board and the transistor array IC8 on the motherboard. The HF_EIN signal is directed to the comparator IC14 on the control board, the output of which remains at logical HIGH during activation. When starting up, the ascending signal is differentiated via the RC element R19, C73 and moves to the gate of the transistor T4 which then briefly connects through and triggers the monoflop IC16. This is the starting pulse at which the generator begins to operate. Using the trim potentiometer TP15, the pulse length of the first monoflop in the IC16 can be set and resulting in a symmetrical sine-wave characteristic for the generator signal (adaptation to the parallel oscillating circuit). 3 CIRCUIT DESCRIPTION 147 / 266 Control board Slot J3 The resetting of the first monoflop IC16 triggers a secondary pulse in the second monoflop IC16 which represents the true actuation pulse for the output stage driver. The length of this actuation pulse is adjustable using the trim potentiometer TP14. The power module generator is therefore always only initiated at the start of a half oscillation through the actuation pulse. Due to the oscillating circuit as load resistance, the oscillation is extended into a complete sine wave. For all further oscillations during an activation phase, the generator is fed back via the resulting sinus signal. A part of the output voltage U_PRIM of the parallel circuit is directed to the comparator IC14, the output pulses of which now trigger the monoflops IC16. The power module generator therefore continues to oscillate as a feedback generator until the activation signal HF_EIN is reaccepted by the processor. In this way, it is ensured that the generator always oscillates exactly at the resonance frequency of the oscillating circuit and the operating frequency need not be manually adapted to the production-related tolerances of the oscillating circuit elements. Synchronization of the QK output stage The quasi-complementary output stage operates at a serial oscillating circuit (on the power module) to produce the required sine-wave current. This serial circuit affects the current in the QK output stage like a flywheel and forces the temporal characteristic of the current to a certain extent. Due to the improved efficiency and to protect the QK output stage, the transistors should always be switched over at the same time that the current in the serial circuit has just made a zero crossing. This then reduces the losses in the transistors. This requirement can best be met according to the principle of feedback. Such a circuit principle has already been realized in the actuation of the power module. There too, the advantages of digital control signals with their low electrical power consumption and its versatility could be combined with the feedback for a generator of high efficiency. The generator cannot start by itself; it needs a starting circuit. The digital oscillator IC18 is a free-wheeling oscillator, the frequency of which should be as close as possible to the frequency of the serial circuit. Its output signal is directed to the priority encoder IC11. As long as no current flows in the QK output stage, the measurement signal of the current U_IHP is zero (measurement point MP1). The comparator IC9 detects no current at input 9, therefore its output signal is low and the monoflop IC13 produces no pulses. Its output is then continuously low and thus also the selector S1 of the priority encoder IC11. As a result, the inputs IA2 and IA3 are switched through to the output. In this way, the signal for the starting circui IC18 or actuating the QK output stage is switched at the start. Once the QK output stage has “started up”, a current is produced there which, at sufficient level, exceeds the threshold of the comparator IC9, Pin 10. Since the current in the QK output stage is half-wave-shaped, a pulse results at the output of the comparator with the frequency of the QK output stage. This pulse triggers the monoflop IC13 at input 4. The ON time has been selected somewhat longer than the period length of the HF signal of the QK output stage, so that the monoflop does not drop out as long as pulses from the generated HF retrigger this monoflop (principle of the watchdog circuit). The monoflop increases the selector input of the priority encoder IC11 to high-level. In this way, the signal from the start generator 148 / 266 3 CIRCUIT DESCRIPTION Control board Slot J3 is no longer switched through for actuation of the QK output stage, but instead the output signal of the comparator IC9, PIN 12. This comparator detects the zero crossings of the high frequency current of the QK output stage and provides a pulse at the rate of the HF at the priority encoder which switches this rate through to the actuation with sufficient current flow of the output stage. In this way, the actuation has now been switched over from freewheeling by means of the start generator in a no-load case to feedback current control in a load case. Hardware electronic safety circuits The current from the QK output stage is measured one more time: First the measurement voltage is divided by means of the divider R57, R61, then rectified using diode D10 and an average is generated using the time constants from the resistor R50 and the capacitor C10. As a result, the comparison voltage from the divider is present at the input of the comparator IC4, on the one hand, and on the other, the average of a voltage which corresponds to the average current of the output stage. If the average output stage current exceeds the set threshold, the comparator tilts. Its output signal blocks actuation of the output stage via the AND gate IC7, Pin 4, and the QK output stage is blocked for a specific minimum time prescribed by the monoflop IC10, part 2. In this way, the circuit is provided with a recovery time and a pump effect is avoided. This is therefore an electronic fuse for the QK output stage. In a similar manner, further measurement dimensions are monitored not only through software, but also through hardware: Voltage and current of the patient circuit are directed via their parameters UP_HF and IP_HF from the Senso-board on the comparator IC6. This also applies to the voltage from the power supply unit U_NETZT and its current U_INT from the power module. Art. No.: 80116-201 09 / 2004 The integrated module IC6 is a comparator, the threshold voltage of which can be preset as a digital word via the control bus. In this way, the threshold voltage can be adapted to current requirements prescribed by the processor. The comparator compares the analog instantaneous values with those limit values set by the processor and passes its Yes/No decisions on to the NOR circuit IC5. There the signals are summarized and directed to gate IC7. If one single parameter has exceeded its limit value, the QK output stage actuation is blocked by the AND circuit IC7. At the same time, the monoflop IC10, Part 1, is triggered, maintaining the blockade for a specific minimum time, so that a pump effect caused by switching off and back on again too quickly is avoided. Via the second part of the AND circuit IC7, further important enable signals are controlled for the QK output stage: • Is there an enable signal from the processor? • Is the safety interlock signal giving its enable? • Is there currently no reset of the processor? If any of these questions can be answered with NO, the QK output stage is blocked. The spark control Several ICC units offer both a control of the HF output voltage as well as optionally a control of the 3 CIRCUIT DESCRIPTION 149 / 266 Control board Slot J3 sparking which occurs during the cutting and coagulation process at the active electrode. Both control principles have concrete applications. The control of spark intensity can be activated via the “HIGH CUT” key. On the Senso-board, the DC voltage U_FUNKE occurring during a spark is gathered via an isolation amplifier (description there) and directed to the control-board. The required set value of the spark intensity is transmitted via the control bus to the digital analog converter IC8. Its analog output signal is combined and compared at the comparator IC4 with the actual value of the spark U_FUNKE. If the actual value is greater than the set value, output 12 tilts to frame potential and illuminates the red LED D1. In addition, the output signal moves to the input Pin 2 of the NOR circuit IC5. The gate IC7 with the monoflop IC10 switches off the QK output stage for a minimum period of time. In this way, the supply voltage for the HF generator is reduced and therefore also the intensity of the spark. Actuation of the QK output stage The MOS field effect transistors of the quasi-complementary output stage require brief start or stop pulses for their actuation during the zero crossing of the sinusoidal output current. As is known from the section “Synchronization of the QK output stage”, there is a pulse at the output of the priority encoder IC11 which is already synchronous to the zero crossings of the output current. This pulse must now be prepared in such a way that a start or stop pulse is produced for each of the two output stage transistors at the right point in time respectively. If one assumes that neither of the two QK transistors are switched conductively after a pause, Transistor A first requires a start pulse. The transistor then switches on and produces a sinusoidal half-wave within the oscillating circuit of the QK output. At the end of this half-wave, this Transistor A must be switched back off using a brief pulse. Then Transistor B should take over the second half-wave and be conductive. Therefore Transistor B requires its short start pulse after Transistor A has switched off. It remains conductive until the zero crossing of the second half-wave and must be shut off again at its end using a pulse. In this way, a complete sine-wave oscillation has resulted and the process repeats itself constantly until the QK output stage is switched off. The output of the circuit IC11 produces a pulse with every zero crossing on the sinus current. However, the actuation requires, as described, two pulses during a half-wave, specifically a start and a stop pulse. It is therefore necessary to double the frequency of the available pulse. This occurs in the EXOR gate IC12 together with the RC low-pass R67, C15. Using this low pass, the signal at input 1 of gate IC12 is slightly delayed compared to input 2, which leads to an output pulse with the length of the delay time for every change in the input signal. The input frequency is thus doubled. The resulting pulses are extremely short. By means of small, though non-negligible running times in the circuit, the signal received in the meantime is no longer completely synchronous to the current zero crossings of the output signal. Using the monoflop IC13, the correct phase relationship of the actuation pulses to the output current can be re-established by specifically extending the pulses. The necessary delay time can be adjusted using the trim potentiometer TP13. By halving the previously double frequency in D-flipflop IC21, Part 2, the original operating frequency of the QK output stage is recreated with a pulse duty factor of 1:1. Output pin 13 has a HIGH level, while Transistor A is addressed. The inverted output 12 has a HIGH level, while Transistor B of the QK output 150 / 266 3 CIRCUIT DESCRIPTION Control board Slot J3 stage is addressed. The output signals A and B thus serve in the selection of currently active transistors. From the previously doubled frequency, the short start and stop pulses are produced for the respectively active transistor. The first part of the monoflop IC17 produces the start pulse, the second part the stop pulse. The first part of the D-flipflop IC21 is additionally actuated by an ON_OFF signal for the safety circuits. In this way, all start pulses can be suppressed on the one hand, while on the other, it is ensured that the transistors can still be shut off in any case. Art. No.: 80116-201 09 / 2004 The arrangement of selection pulses for the individual transistors with the on/off pulses is made in the NAND gate IC1 on the QK output stage. 3 CIRCUIT DESCRIPTION 151 / 266 QC power stage Slot J4 The QC output stage (30128- 528) The following functions are located on the PCB: • Decoding of the switch signals • Power-on time-delay circuit • Preamplifier, driver and electrical isolation of actuation • Clamping circuit • Push-pull output stage. The output stage acts as a power amplifier for high-frequency signals, as is required, for example, in switchedmode power supply units and high-frequency surgical units. This output stage is designed for push-pull operation on account of the greater efficiency and larger possible output power. As there are frequently problems in procuring and storing identical P and N channel transistors - which are required for a push-pull output stage - it is advantageous to be able to use two transistors of the same type. This circuit is then called a quasi complementary output stage, or QC output stage for short. The aim of the development was to produce an output stage with the highest possible efficiency and a sinusoidal output signal with the smallest possible proportion of harmonic frequencies. Actuation should require as low a power as possible and preferably be possible in digital mode so that the transistors can be used in switching operation with low power loss. All the stated requirements led to the present circuit. Circuit principle The complementary output stage consists of two N channel MOS-FET transistors, T1 and T2, which are operated alternately as switches. The amplified digital output signal is present at the source of transistor T1 and simultaneously at the drain of transistor T2, since these connections are conductively connected to each other. However, since a sinusoidal output signal is a required condition, the output of the output stage is switched to an oscillating circuit (which is located on the next PCB). The QC output stage is actuated between the gate and source of the respective transistor, which always leads to electric potential problems with this circuit logic, since the actuation signal has to be superimposed on the output signal. This problem can be solved by actuating the relevant transistor via a transformer. If this method is used for both output stage transistors, it has the advantage that the actuation circuit can be completely isolated from the output circuit and the high output voltages occurring in the event of a defect cannot damage the actuation circuit. The disadvantage, however, is that the transformer cannot transmit any DC signals. This is where the gate-source capacitance of the MOS-FETs proves useful. Since this capacitance is of high quality, the gate-source capacitance can maintain an applied charge for a sufficient length of time. The clamping circuit consisting of diodes D8, D9, D10 and D5, D6, D7 has the effect that the gate-source capacitance can be charged with a short positive pulse. This positive pulse is fed via diode D8 to the gate of transistor T1 and charges the GS capacitance sufficiently for the transistor to be switched to a conducting state. 152 / 266 3 CIRCUIT DESCRIPTION QC power stage Slot J4 This charge cannot then flow back into the actuation circuit after the actuation pulse has ended, since diode D8 acts as a block and diode D9 also permits no reverse current due to its Z-diode characteristic. The result is that the transistor remains in a conducting state as long as its GS capacitance has sufficient charge. If, on the other hand, a sufficiently large negative pulse comes from the actuation circuit, the Z-diode voltage at diode D9 is exceeded and the GS capacitance can be discharged again. Transistor T1 thereby acts as a block. It can thus be seen that a MOS-FET transistor can be operated in switching mode via such a clamping circuit by means of a pulse transformer with short start and stop pulses. Capacitors C4 and C5 are connected in parallel to the GS capacitance and support the effect described. Since their capacitance is significantly higher than the corresponding gate-source capacitances, the circuit becomes largely independent of parameter scatter of the gate-source capacitances of different production batches. It is the task of actuation to time the actuation process in such a way that each of the two power transistors receives a short start pulse and, after a defined pause, a stop pulse at the right time. It must be ensured that the two transistors are never switched to a conducting state simultaneously, since a short circuit of the supply voltage would result! Circuit description The actuation signals are generated on the control board (30128-357). These signals are short pulses for starting and stopping the output stage transistors and two additional pulses, one for selecting the upper output stage transistor and the other for selecting the lower output stage transistor. Art. No.: 80116-201 09 / 2004 These pulses come via connector J1 to the NAND gates ½ IC1 and IC4 on the QC board. There the "Start" and "Transistor A" pulses, for example, are brought together (as are "Stop" and "Transistor A"). The following pulse sequences are thus present at the outputs of IC 1: • Start transistor A • Stop transistor A • Start transistor B • Stop transistor B. These pulses are each preamplified in the triply parallel gates of the NOR circuits IC 2 and IC3. The outputs of IC2 and IC3 actuate the driver stages, each consisting of two parallel transistors T3 to T10. The output signal of the four parallel drivers is then amplified to such a level that the pulse transformers UE1 and UE2 can be operated with sufficient energy. In the case of a complementary output stage, it must be strictly ensured that the two output stage transistors are not simultaneously in the activated state, as this would cause a short circuit across the two transistors and damage the output stage beyond repair. Therefore, the stop pulses generally have the highest priority. They ensure a safe state of the output stage during undefined operation. The start pulses are separated in the actuation logic to ensure that only one output stage transistor is actuated at any one time. An undefined state could, however, occur in rare cases if the +15 V operating voltage is too low at any point 3 CIRCUIT DESCRIPTION 153 / 266 QC power stage Slot J4 in time. For this possibility, in which the logic might operate undefined, a "Power-on time-delay circuit" avoids undefined starting of the output stage transistor. With transistor T11, the supply voltage VDD = + 15 V is monitored. If this voltage is missing, capacitor C10 is quickly discharged via diode D12. This logical LO signal is sent to the two NAND gates ½ IC 1 and blocks the starting pulses. If the supply voltage is present, capacitor C10 is charged to 15 V via transistor T11 and resistor R8 in a predefined delay time. This HI signal reaches the two NAND gates again (see above) and enables the start pulses for the output stage. On the secondary side of the driver transformers, short, steep spikes occur, initially a positive pulse for starting, then a negative pulse for stopping the corresponding output stage transistor. These spikes reach the gates of the MOS-FET transistors via the clamping circuit described above, and switch the gates. The amplified output signal is tapped at the two mutual connection points of the transistors. 154 / 266 3 CIRCUIT DESCRIPTION Power module Slot J5 Power module UL Slot J5 The following assemblies are found on the PCB: • Serial oscillating circuit for the QC power stage • Generation of the operating voltage for the HF generator • Driver and output stage of the HF generator • Output circuit of the HF generator • Measurement of various operating parameters Serial oscillating circuit for the QC power stage The QC power stage has the task of generating a sine-wave current as free of distortion as possible. The QC power stage is not used in the ICC to generate high-frequency power for cutting or coagulating, but instead functions here as a switched-mode power supply unit with a high switching frequency and efficiency. The QC transistors are always switched over in the zero crossing of the current. The current is forced at the same time through the serial circuit from coil L2 and capacitor C17 into a sinusoidal shape. Generation of the operating voltage of the HF generator The high-frequency power is tapped via the transformer UE2 and rectified by means of the diodes D3, D4. The capacitors C4, C10 are filter capacitors. With 22 µF, they can be measured relatively minimally and the ripple of the output voltage is nevertheless small due to the high operating frequency. In this way, this switched-mode power supply unit can also be stabilized very quickly. The output DC voltage of the power supply unit is available at the cathode of diode D3 and is a) directed via the U–NT–STE connection to supply the ST output stage, b) used to operate the HF output stage via relay REL1. The negative pole of the capacitor C10 leads to the chassis via the resistor R5. R5 is used as a shunt to measure the output current taken from this power supply unit. The voltage alloted to R5 if used for measurement by U–INT. Art. No.: 80116-201 09 / 2004 In the activation pauses, the power supply unit can be discharged via NTE (power supply enable). To do this, the transistor T3 is switched conductively and discharges the stored power supply voltage via the resistor R12. The power supply output voltage is divided into smaller values via the resistor divider R7, R8 and lead to the measuring device (U-NETZT). Via the relay REL1, the transformer UE2 can be switched over. With an activated relay, a higher output voltage can be taken from the transformer. This is required to operate the ST output stage to generate especially high voltage peaks. This high voltage is switched off to protect the HF output stage by means of the second contact from relay REL1. 3 CIRCUIT DESCRIPTION 155 / 266 Power module Slot J5 Power module UL Slot J5 Driver and output stage of the HF generator The actuation signal for the HF output stage is generated on the control board (IC16) and fed to the power module driver IC1 via the motherboard. Due to the high-gate source capacitance of the output stage transistors T1 and T2, the driver must be able to emit and accept high reactive currents when transferring this capacitance. That is why two drivers are switched in parallel. The output current of the driver is restricted by the resistors R1 and R19 to protect the driver. The output stage transistors T1 and T2 are switched in parallel due to the necessary high current and operate on output transformer UE1. Output circuit of the HF generator The output circuit of the output stage consists of the transformer UE1 on the primary side and the two capacitors C5 and C7 switched in parallel. This parallel circuit is designed for the operating frequency of the HF generator and forms a sine-wave voltage in a no-load case. At the secondary side, there is a serial circuit made up of coil L1 and the capacitor C1. This serial circuit is also designed for the operating frequency of the HF generator and produces a sine-wave current in the output circuit. In this way, in every load state of the generator, both the voltage and the current are sinusoidal. Measurement of various operating parameters The output current in the QC power stage flows via the transformer UE3 which is secondarily loaded with the resistors R13, R14 and R15 and is used as a current transformer. The voltage at these resistors corresponds to the output voltage of the QC power stage (half-cycle current) and is routed as U-IHP to the control board. The current in the power supply unit is measured at shunt R5 and routed as U-INT (voltage as a function of the power supply current) to the control board. The output voltage of the power supply unit is divided via the resistors R7, R8 and routed as U-NETZT to the control board (IC14). The HF primary voltage of the output stage is picked up at the oscillating circuit capacitor C5 and routed as U-PRIM to the control board (IC14). The output stage temperature is recorded by the thermistor NTC1 and routed as voltage from the divider R2, NTC1 with the designation TEMP to the control board (IC2). 156 / 266 3 CIRCUIT DESCRIPTION ST power stage Slot J6 The following assemblies are located on the PCB: • Output stage with driver for high HF voltage pulses • Relay with relay control • Feedback of actuation frequency for the CPU ST power stage The ST power stage is used to generate high pulses for coagulation without a cutting effect, particularly for quick superficial coagulation. The designation “ST” output stage is derived from the abbreviation of spray generator for TUR. The power control and the generation of actuation pulses are found on the control board. The actuation pulses (TSI-STE) move to the driver IC4 and then to the ST output stage transistor T1. This operates on the output transformer UE1, the secondary side of which emits the high frequency via the capacitors C1 and C2 as well as the relays REL1, REL2 and REL3 at the connections AE and NE. The emitted high frequency is fed to the outputs via the Senso-board. The capacitors C1 and C2 serve as a high-pass for suppression of faradic effects and are also an additional protection in isolating the patient circuit from the equipment circuit. Due to the necessary high electric strength, two relay contacts each are switched in series. The output relay is actuated via the relay driver IC7 which receives its actuation signals via the bus and the target memory IC6 (D-flipflop). The ST power stage is supplied with voltage that is switched with relay REL19 from the power module via the connectors J2 and J3. The integrated counter IC1 subdivides the frequency of the actuation signal of the ST output stage to a low frequency, so that the frequency in the CPU can be determined by means of a counting loop. Art. No.: 80116-201 09 / 2004 Since the processor prescribes the actuation frequency, it receives feedback in this way as to whether the set and actual values agree. This is important since the output power of the ST power stage is controlled via the repetition frequency of the individual pulses. 3 CIRCUIT DESCRIPTION 157 / 266 Senso-board Slot J7 The following assemblies are located on the PCB: • Current monitor for the patient circuit • Voltage monitor for the patient circuit • Phase monitor for the patient circuit • Spark monitor for monitoring the sparking at the electrodes • Safety system for the neutral electrode (NESSY) • Relay control Current monitor for the patient circuit The high-frequency current moves from the generator to the Senso-board via the connectors J1 and J2. On the way to the electrodes, the current is directed by the transformer UE1, the load resistors R11 and R12 of which are transformed at a ratio of 2500:1 to the primary side and thus serve as a shunt for current measurement. The output voltage of the secondary winding is also proportionate to the high-frequency output current. This voltage now moves to one of the operation amplifiers IC7 and IC8, which represent an »ideal rectifier« together with the diodes D27, the capacitor C30 feedback resistor R30. The rectified voltage IP_PAT is lead via the control board to the processor and, after further amplification in the operation amplifier IC8, is also lead as voltage IP_PAT A for adjustment at the trim potentiometer TP6 also to the processor. The output voltage of the transformer UE1, on the other hand, moves after a restriction through the diodes D16, D17 to the comparator IC3, the open collector of which operates at the resistor R23. There the zero crossings of the HF current are detected, together with the second part of the comparator IC3, at the output of which a signal according to the zero crossing of the HF voltage is present. Using the common load resistor R23, this circuit represents a “WIRED OR”. There is a digital signal at the output the pulse length of which corresponds to the phase relationship between voltage and current of the HF signal. The voltage monitor for the patient circuit Parallel to the lines which lead to the active electrode AE and the neutral electrode NE, the high-frequency voltage is picked up and led via the capacitor C1 to the transformer UE2, which transforms the voltage by a factor of 12.5 weakened to the secondary winding. After a further halving of the measurement voltage in the resistor divider R15, R16, it moves, similar to the situation in a current monitor, to an active, ideal rectifier, consisting of the operation amplifiers IC4, IC8 as well as the diode D23, the capacitor C33 and the negative feedback resistor R52. The parameter for the high-frequency patient voltage UP_HF is then led to the processor via the control board, as is also the amplified signal UP_HF A. At the same time, the output voltage of the transformer UE2 is directed to the comparator IC3 which emits a digital signal to the “WIRED OR” during its positive phase. (See above for description). 158 / 266 3 CIRCUIT DESCRIPTION Senso-board Slot J7 Phase monitor for the patient circuit The phase monitor determines the phase angle between the voltage and current in a high-frequency patient circuit. In this way not only the apparent power, but also the active power emitted to the patient can be calculated. As already described in the current monitor and voltage monitor sections, the zero crossings of the voltage and current characteristics are evaluated in the comparators of the open collector operation amplifier IC3 and summarized as “WIRED OR” in the load resistor R23. There is therefore a digital signal at the output 7 of the IC3, the pulse length of which corresponds to the phase relationship between the current and voltage. This signal is smoothed using the diodes D20 and D21, the resistor R40 and the capacitor C13 (averaging), then amplified and decoupled via the operation amplifier IC9. The voltage U_PHASE corresponding to the phase between the HF current and HF voltage is directed to the control board and can be adjusted there using the trim potentiometer TP 7. The result is fed to the processor. The spark monitor for monitoring the spark cycle at the electrodes During the cutting process, for example, there is sparking at the active electrode. To maintain a consistant quality for the cut, the spark must be recorded and controlled in its intensity. Our generators produce sine-wave output voltages with a very low distortion factor. If a spark occurs in a patient circuit, harmonic frequencies of the output signal are thus produced by the nonlinear characteristic of the spark channel. Harmonics can be either harmonics or DC voltage. This is why one can also say “rectifier effect of the spark”. The DC voltage resulting in this way moves from the patient circuit to the spark monitor of the ICC. It moves via the resistors R1, R2, R4 and R5 to the Z-diodes D1 and D2, switched antiserially, which limit the signal to 15 volts. Then follows the operation amplifier IC2, switched as an isolation amplifier, which makes the DC voltage signal durable. Art. No.: 80116-201 09 / 2004 The DC voltage proportional to the spark intensity in the patient circuit must now be evaluated by the unit and fed isolated to the unit circuit. The remainder of the circuit is in principle an isolation amplifier: DC voltage signal is chopped, fed isolated via a transformer to the unit circuit and then rectified again. The oscillator module IC1 produces a square-wave signal with a pulse duty factor of 1:1, present at outputs 10 and 11 of the IC1. This is the chopper frequency which actuates the transistor T1 and T2 in push-pull operation. This push-pull amplifier functions on the output transformer UE5, which is operated via the isolation amplifier IC1 using the spark voltage as the operating voltage. In this way, the spark voltage is chopped from the transistors T1,T2 and fed via the transformer UE5 as an isolation at the secondary side to the unit circuit as AC voltage. Diode D15 then follows on the secondary side, which again rectifies the alternating signal thus resulting and smoothes this by means of the capacitor C22. 3 CIRCUIT DESCRIPTION 159 / 266 Senso-board Slot J7 In this way there is another DC voltage, proportional to the spark intensity, which is reduced via the resistor divider R32, R33 and then fed to the isolation amplifier IC9. The output signal U_FUNKE moves from there via the control board to control the processor. The electronic components of this isolation amplifier within the patient circuit require an isolated voltage supply to function. For this, a DC/DC converter is used which consists of a Colpitts oscillator (circuit around Transistor T6), the alternating signal of which is transferred from the transformer UE6 to the secondary side and rectified by diodes D4 and D6. The DC voltages thus resulting are limited to 9.1 volts by the Zdiodes D3 and D5 respectively. In this way, voltages of +9.1 volts and –9,1 volts are available to the electronic circuit within the patient circuit which is identified with I+9 and I–9. Safety system for the neutral electrode (NESSY) Problem description: The line for the neutral electrode must be monitored for wire break according to the standard since there is risk of topical burns for the patient with an incorrect supply line. In the ICC, correct application of the neutral electrode on the patient is also checked, as well as the uniform distribution of the HF current to the two electrode surfaces (symmetry). To monitor the connecting line, the cable is designed as a two-wire connection, the loop resistance of which is measured. If the resistance value determined in this way is below a specific limit value, one can assume that the neutral electrode line has no wire break. With conventional single-surface neutral electrodes, monitoring is performed in this way. However, such monitoring cannot determine whether the neutral electrode is actually applied to the patient or whether it is lying around somewhere else. To also check the correct application to the patient, the contacts of the neutral electrode must be divided, whereby a control current must flow over the electrode halves and the patient. This control current permits resistance measurement of the tissue impedance of the patient and thus information as to whether • the electrode is not connected or has a wire break (impedance > 120 ohms), • is lying directly on the operating table (impedance < 5 ohms), • or, most probably, is correctly applied to the patient (impedance between 5 and 120 ohms). If the high-frequency current is not flowing regularly over both surfaces of a divided neutral electrode, this can lead to burns due to current concentration under the electrode. It is therefore also necessary to check the symmetrical current distribution on both halves of the electrode. The NESSY system, a neutral electrode safety system patented by ERBE, takes care of all the tasks mentioned. Principle of the NESSY measurement system The electric resistance of the neutral electrode is measured via an oscillator, the amplitude of which is dampened by the resistance from the patient and measured by the system. With a correct circuit design, a sufficiently precise resistance measurement is possible in this way. 160 / 266 3 CIRCUIT DESCRIPTION Senso-board Slot J7 The symmetry of HF current on the halves of the neutral electrode is measured by a symmetrical transformer, the output voltage of which is a function of current symmetry. Implementation: The circuitry is found on the Senso-board. The oscillator is designed as a frequencyselective feedback amplifier: The amplifier IC6 actuates the push-pull stage, consisting of the transistors T4 and T5, and passes the amplified output signal to the frequency-selective serial circuit made of capacitor C20, coil L1 and the inductivity from the primary side of transformer UE4. One part of the output signal at the transformer UE4 is picked up via the resistor R18 and fed to the active bandpass from the operation amplifier IC5 and its wiring. The center frequency is equal to the resonance frequency of the previously mentioned serial circuit. One part of the output signal from the active bandpass is fed again in proper phase to the amplifier IC6, such that the entire arrangement fulfills the oscillation condition and oscillates at the resonance frequency as an oscillator. The oscillator can be switched off via the transistors T7 and T8 by means of the disable signal OSZI_DIS from the processor. The resistance of the neutral electrode is determined by loading this oscillator with the resistance to be measured. The voltage collapses on the internal impedance of the oscillator according to the load. Thus every oscillator voltage can be assigned an appropriate resistance value. The oscillator voltage is present at the input of the active bandpass and can be picked up at the output of the operation amplifier IC6. After peak rectification by diode D30 and capacitor C34, the measurement voltage U_NESSY can be picked up at the isolation amplifier IC9 and moves via the adjustment on the control board (trim potentiometer TP9 ) to the processor to determine the resistance of the neutral electrode. The high-frequency output voltage for the neutral electrode is balanced by the capacitors C2 and C3 on both lines to the neutral electrode, i.e. divided equally. Art. No.: 80116-201 09 / 2004 Whether the current on both lines to the neutral electrode is now of equal size, depends on whether the two electrode halves of the split neutral electrode are applied with the same surfaces to the patient. By measuring the symmetry of the current and the resistance, it is therefore possible to receive information as to whether the electrode is applied well to the patient with this entire surface. The high-frequency current flows via the two primary windings 1 and 2 of the transformer UE3 in such a manner that the resulting magnetic flow is cancelled out by equally strong currents. Thus in this case, no voltage is induced at winding 3 of the transformer UE3. The reverse is true: The more unsymmetrical the current flow is, the greater the voltage induced in winding 3. The high-frequency output voltage, which is a measure for the unsymmetry of the current flow, is rectified using diode D9 and filtered with capacitor C57, then amplified using the operation amplifier IC9, so that a signal U_SYM is available which moves via the control board to the processor for evaluation. The current density is calculated mathematically from the following dimensions, now known: • High-frequency current, • Symmetry of the high-frequency current at the neutral electrode, • Contact resistance of the neutral electrode to the body of the patient. 3 CIRCUIT DESCRIPTION 161 / 266 Senso-board Slot J7 The relay control The relays REL1, REL2 and REL3 are used to switch on the required output sockets. The relays are controlled by the control bus via the target memory D-flipflops IC10 and the transistors T9, T10 and T11. 162 / 266 3 CIRCUIT DESCRIPTION Relay board Slot J8 (for ICC 300, 350) The following assemblies are located on the PCB: • Fingerswitch monitor 1 • Fingerswitch monitor 2 • Relays and their actuation for optional, separate connection of high-frequency to the required output sockets. The fingerswitch monitors are used to activate the surgical unit from the surgeon's handle. The monitor can detect which output sockets carry high frequency and which current quality (cutting or coagulating) should be switched on. Since the handles are within the patient current circuit electrically, the monitor circuits must be designed isolated from the unit circuit and from the chassis. The monitor circuits must therefore be supplied with current from a floating voltage source. These voltage sources must however also be well isolated at high frequencies, such as are used in high-frequency surgery. This means that monitors with their voltage sources must be designed as low capacity compared to the rest of the unit. The voltage supply for the monitors is realized by two push-pull converters. The voltage converter for monitor 1 essentially consists of the transistors T1, T2 and the transformer UE 1. The voltage converter for monitor 2 essentially consists of the transistors T5, T6 and the transformer UE 2. The transistors of this converter are monitored via the oscillator IC 6, which supplies a symmetrical, squarewave signal, that is shortened in the monoflop IC5, in such a way that it is ensured that the two transistors of a converter are not switched on at the same time. The NAND circuits of the IC 4 create an appropriate push-pull signal that is directly suitable for actuation of the converter transistors. Since both fingerswitch monitors have identical circuits, the circuitry of only one of the two monitors is explained in the following: On the secondary side of the converter transformer UE 1, a needle-shaped output signal forms in the midfrequency range which is directed both to the diode bridge D1 to D5 with the transmitter diode from IC 1 as well as via the RC low-pass C3, R2, C1, R1 on the handle's selection keys. Art. No.: 80116-201 09 / 2004 Due to the bridge circuit for diodes D1 to D5, the transmitter diode for optocoupler IC 1 may be illuminated during both half-waves and connect through the receiving transistor for the optocoupler IC 1 by pulses. If, on the other hand, a key on the handle is pressed, a voltage needle for the converter voltage is dampened by the Si diode integrated into the handle, so that the transmitter diode for the coupler IC1 can no longer be illuminated for the affected voltage needle and the appropriate transistor is no longer connected through at exactly this voltage needle. The output signal from the receiving transistor is directed to the two data inputs for the D-flipflops of the IC3. These two D-flipflops additionally receive the actuation signals for the converter transistors, so that a definite assignment is possible here between the dampened voltage needle and the actuation signal. The two D-flipflops therefore function as a scanning circuit in proper phase, the output signal of which can be assigned to the switched key in the handle. 3 CIRCUIT DESCRIPTION 163 / 266 Relay board Slot J8 (for ICC 300, 350) Since a diode is switched in series for each of the two pushbuttons on the handle, although both diodes have a definite and opposite polarity, this circuitry can be detected exactly via the dampened half-wave after pressing a pushbutton, as to whether and which button was activated. Outputs 2 or 12 on the IC3 therefore provide reliable information as to whether the “cutting ” or “coagulating” key was pressed. The information that no key was pressed is just as possible as the information that both keys were pressed simultaneously. Isolation of the fingerswitch monitor is complete via the transformer UE1 and via the optocoupler IC1. The function of the second fingerswitch monitor is equivalent. The two relays REL 1 and REL 2 are also found on the same PCB which safely separate the two output sockets for the active electrodes from the generator circuit when the unit is not activated, while connecting only the activated output socket to the generator when the unit is activated. Due to the higher electrical strength that can be achieved, two relay contacts are switched in series. The two relays are activated from the CPU via the target memory D-flipflops IC8 and the transistors T3, T4. 164 / 266 3 CIRCUIT DESCRIPTION Display board The following assemblies are found on the PCB: • 7-segment displays and their actuation • Keyboard and LED matrix for light fields • Operating board bus and keyboard treatment • Target memory and driver for rows and columns of the display matrix • Jumpers for activation of special software 7-segment displays and their actuation All settings on the ICC are, insofar as this concerns numerical values, shown on the display board with 7segment displays. The data to be displayed come from the operating board bus system B1BUS via the target memory (8-fold D-flipflops) IC5 and IC7 on the segment driver IC6. This results in the bus for the segment actuation identified as S1BUS. The segment bus S1BUS controls the series resistors necessary for current limitation in the LEDs the segments A to F and decimal point DP for the displays LED1 and LED2. The columns are selected by the target memory IC5 via column driver transistors, which are depicted in the circuit diagram each directly over the 7-segment displays. In this way, every individual segment within the matrix is addressable via the column selection and the segment control. Keyboard and LED matrix for light fields All keys for entering operating parameters are designed as membrane buttons and switched electrically in the form of a matrix with columns and rows. In addition, all visual displays with the exception of numerical displays are designed in the form of LED displays or LED fields which are electrically switched as a matrix. Art. No.: 80116-201 09 / 2004 Operating board bus and keyboard treatment To control the operating and display board, an independent bus system is required that is derived from the address bus (A0 to A7). To do this, the addresses A0 to A7 are inverted in the transistor array IC12 and through the transistor T21 and forming the operating board bus B1BUS, which now addresses the target memory of the display board in conjunction with the corresponding independent chipselect signal from the inverter IC8 and the required assemblies. The rows of the keyboard are multiplexed via the target memory IC1; this produces the row actuation pulses TZ1 to TZ4 (keyboard row). If a specific key is now activated, this sends its answer during its activation time via the row actuation pulse as an output signal via a line for the keyboard columns TS2 to TS3 to the keyboard encoder IC11, which forms a 4 bit binary number from this and directs it via its output to the CPU for evaluation. 3 CIRCUIT DESCRIPTION 165 / 266 Display board Target memory and drivers for rows and columns of the display matrix The LED matrix is actuated by the already described internal bus system B1BUS of the display board. The 8-fold D-flipflops IC2, IC3 and IC12 are used as target memories for columns (IC2) and rows (IC3). The columns of the lamp matrix LS1 to LS6 are activated via the driver transistors T2, T20, T11, T10, T4 and T9 switched as emitter followers in a multiplex method and each switched for a brief time to +5 volts. The current is then led via the appropriate LED and directed via the necessary current limitation resistors as well as the transistor array IC4 to chassis. The blue LEDs D36 and D37 for display of the coagulation channels are an exception, the anodes of which are permanently at +5 volts via the current limitation resistors and are switched on via the transistor array IC13. Jumpers for activation of special software Jumpers J3 to J10 are intended for software specialities available for tests and for switching on special features in certain countries. The corresponding jumpers are already placed during production and must not be changed arbitrarily. 166 / 266 3 CIRCUIT DESCRIPTION Upper wiring module The “upper wiring module” PCB directs the rectified supply voltage from the motherboard via the plug J14 as a supply voltage to the QC power stage. In addition, this PCB is used as a connection between the QC power stage and the power module, since currents of this dimension cannot be directed via the motherboard. The lines between the QC power stage and the motherboard are directed through a ferrite core to reduce interferences from the QC power stage into the network. CAUTION Art. No.: 80116-201 09 / 2004 This PCB is at supply voltage potential 3 CIRCUIT DESCRIPTION 167 / 266 Chapter 4 Block diagrams ICC 200 Block diagram V 2.0 / V 4.0 Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Art. No. 80116-201 09 / 2004 Ers. durch = Repl. by 4 BLOCK DIAGRAMS 171 / 266 ICC 300 V 2.0 / V 4.0 Block diagram Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Ers. durch = Repl. by 172 / 266 4 BLOCK DIAGRAMS ICC 350 V 2.0 / V 4.0 Block diagram Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Art. No. 80116-201 09 / 2004 Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Ers. durch = Repl. by 4 BLOCK DIAGRAMS 173 / 266 Chapter 5 Circuit diagrams PCBs for ICC 200, 300, 350 OUT SG531P EN G IC16 C1 Vcc +5V 68nF C4 OSC PF1 VCC VBAT IC10 68nF VNOT BAT ON RES RES PFD WD0 WD1 CE IN GND 68nF C5 C11 13 11 14 10 16 15 5 2 68nF C6 5 GND Vcc +5V 1 2 3 4 5 2 1 Vcc +5V VNOT 3 74HC00 & 6 5 GND IC11 74HC74 S C D R IC13 CE OUT 12 LOW LINE 6 8 OSC SEL GND 4 MAX691 7 9 1 3 Vcc +5V R12 D2 68nF C3 GND 1 R3 R4 R21 Vcc +5V 220R & 74HC00 10 9 8 13 12 11 R6 IC13 8 9 & 11 74HC00 13 12 Vcc +5V CE_IN Vcc +5V IC15 74HC74 S C D R Vcc +5V CLK WDI RES RES CE_OUT 10 Vcc +5V IC15 GND 10nF C15 Vcc +5V Vcc +5V Vcc +5V 68nF C7 1N4148 5k6 R11 68nF C8 5k6 R10 68nF C9 5k6 68nF C10 5k6 R13 +24V 8k2 1k GND + 2k2 3V 5k6 68nF C2 GND 68nF R20 178 / 266 M1 CLK RES INT 5k6 R5 WAIT 5k6 R14 WR RD IORQ MREQ RES 220R Vcc +5V IC1 Nr. CLK 11 10 R Q1 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 nderung 3 2 1 15 14 12 13 6 4 5 7 9 Z84C00 74HC4020 CLK IC12 SIO-CLK PIC-CLK 6 26 RESET Vcc +5V 25 BUSREQ 23 BUSACK 16 INT 17 NMI 24 WAIT 18 HALT 28 RFSH 21 RD 22 WR 19 MREQ 20 IORQ 27 M1 Datum 220R 3 A15 Name GND 5 4 6 3 2 1 5 4 & & DMUX 0 7 5 6 7 0 1 2 3 4 0 1 2 3 4 5 6 7 27 22 26 20 19 18 17 16 15 13 12 11 Name 74HC138 G Datum 2 0 0 7 DMUX CE1 CE2 OE R/W D0 D1 D2 D3 D4 D5 D6 D7 74HC138 G IC9 2 0 IC8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 5864 N.C. VCC IC2 7 9 10 11 12 13 14 15 7 9 10 11 12 13 14 15 WR Blatt 1 von 3 LP bs.: 30128-052 LP un.: 40128-026 Gepr ft Vcc +5V 2 1 5 4 CS11 CS10 CS9 CS8 CS7 CS6 CS5 CS4 CE_OUT JP1 VNOT & 3 74HC00 & IC15 5 4 27C512 A0 A1 A3 A2 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 IC3 CE_IN 74HC00 6 1 27 26 2 23 21 24 25 3 4 5 6 7 8 9 10 IC11 A0-A15 A13 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig D0-D7 Gezeich. 29.07.92 M.Fritz B M1 A5 A4 A3 GND 6 2 A14 Vcc +5V 1 2 23 21 24 25 3 4 5 6 7 8 9 10 28 1 A13 A0-A15 A14 J2/7C IORQ D0-D7 A0-A15 MREQ 13 10 9 7 8 12 15 14 5 4 3 2 1 40 39 38 37 36 35 34 33 32 31 30 R19 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 VNOT 20 19 18 17 16 15 13 12 11 6 D0-D7 30128-052 Zeichnungsnummer/DWG.NO CPU Benennung/Title ICC Gert/UNIT 74HC00 & IC15 CE OE 22 D0 D1 D2 D3 D4 D5 D6 D7 DBUS ABUS ICC 200, 300, 350 CPU PCB 30128-052 CIRCUIT DIAGRAMS BT1 R1 ABUS DBUS CS8 WAIT RD IEI_5 INT CLK RD IORQ 21 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 D IC14 15 RD RDY 16 CS AD7824 10 22 A1 20 19 18 17 9 8 7 6 A0 D0-D7 CLK RD INT IEI 22 IEO 24 23 25 35 A 3 VREF- 13 VREF+ 14 AIN4 1 AIN3 2 AIN2 B0 B1 B2 B3 B4 B5 B6 B7 34 33 32 31 30 29 28 27 GND Vcc +5V BRDY 21 BSTB 17 AIN1 4 Z80PIO B/A SEL C/D SEL CE 37 M1 36 IORQ 4 5 A1 CS4 6 A0 ARDY 18 ASTB 16 7 8 9 10 J2/6C WDI J2/7C MC-FREI J1/8 J1/9 J1/10 J1/11 J1/19 J1/18 J1/17 J1/16 J1/15 J1/14 C16 12 J1/13 GND 180nF C17 M1_PIO Vcc +5V J1/12 GND CS5 A1 A0 IEI_6 IEI_5 INT CLK RD IORQ M1_PIO 180nF C18 13 GND 180nF C19 14 GND CLK RD INT 24 IEI 22 IEO 23 25 35 CE 37 M1 36 IORQ 4 5 6 1k 1k R15 1k R16 1k R17 R18 Z80PIO B/A SEL C/D SEL D0 D1 D2 40 D3 39 D4 38 D5 3 D6 2 D7 1 20 5 A0 A1 A2 A3 A4 A5 A6 A7 4 D0 D1 D2 40 D3 39 D4 38 D5 3 D6 2 D7 1nF RN1 1 3 20 GND 8 IC5 J2/9A J2/6A J2/7A J2/8A Nr. BRDY 21 BSTB 17 34 33 32 31 30 29 28 nderung J2/8C J1/21 J1/22 PIC-RTCC J1/24 J1/25 J1/26 IEI_7 IEI_6 INT CLK RD IORQ M1_PIO CS6 Datum CLK RD INT 24 IEI 22 IEO 23 25 35 Name Vcc +5V Z80PIO B/A SEL C/D SEL CE 37 M1 36 IORQ 4 5 1 20 6 B0 B1 B2 B3 B4 B5 B6 B7 IC6 D0 D1 D2 40 D3 39 D4 38 D5 3 D6 2 D7 19 A1 J1/27 J1/35 J1/34 J1/33 J1/32 J1/31 J1/30 J1/29 D0-D7 A0 18 7 8 9 10 12 13 14 J1/28 27 A0 A1 A2 A3 A4 A5 A6 A7 15 ARDY ASTB 16 6 19 8*1k D0-D7 C20 15 GND + 18 7 8 9 10 12 13 14 34 33 32 31 30 29 28 27 BRDY 21 BSTB 17 B0 B1 B2 B3 B4 B5 B6 B7 ARDY ASTB 16 A0 A1 A2 A3 A4 A5 A6 A7 15 Datum D1 Name 1N4148 FISCH-B3 FUSS-A2 FISCH-B2 FUSS-B1 FISCH-A2 FUSS-A1 J2/13C FUSS-B2 FISCH-A3 FISCH-A1 J2/18C FISCH-B1 J2/19C SICHER J2/20C Blatt 2 von 3 LP bs.: 30128-052 LP un.: 40128-026 Gepr ft Gezeich. 29.07.92 M.Fritz B GND 68nF C14 IC4 R9 19 2 15uF D0-D7 9 GND + R7 M1 CLK RD & IC11 8 Z80PIO 34 33 32 31 30 29 28 27 & IC11 11 74HC00 13 12 30128-052 M1_PIO J2/27C J2/26A J2/26C J2/25A J2/25C J2/24A J2/24C J2/23A J2/27A J2/28C J2/28A J2/29C J2/29A J2/30C J2/30A J2/31C Zeichnungsnummer/DWG.NO CPU 18 7 8 9 10 12 13 14 15 BRDY 21 BSTB 17 B0 B1 B2 B3 B4 B5 B6 B7 Benennung/Title ICC A0 A1 A2 A3 A4 A5 A6 A7 ARDY ASTB 16 Vcc +5V Gert/UNIT 74HC00 10 9 INT 24 IEI 22 IEO 23 25 35 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND IEI_7 INT CLK RD IORQ B/A SEL C/D SEL CE 37 M1 36 IORQ 4 5 1 20 6 CS7 IC7 D0 D1 D2 40 D3 39 D4 38 D5 3 D6 2 D7 19 A1 RES D0-D7 A0 M1_PIO 680k ABUS 1 22k DBUS R8 CIRCUIT DIAGRAMS 5M6 C13 5 15uF Art. No. 80116-201 09 / 2004 ICC 200, 300, 350 CPU PCB 30128-052 179 / 266 7 RES J1/35 J1/34 J1/33 J1/32 J1/31 J1/30 J1/29 J1/28 J1/27 J1/26 J1/25 J1/24 J1/22 J1/21 J1/19 J1/18 J1/17 J1/16 J1/15 J1/14 J1/13 J1/12 J1/11 J1/10 J1/9 R24 1 2 3 4 5 6 7 8 RA1 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 16 15 14 13 12 11 RA2 8*2k2 1 2 3 4 5 6 7 8 9 10 RA3 8*2k2 1 2 3 4 5 6 7 8 8*2k2 2k2 2k2 R22 J1-40 J1-35 J1-34 J1-33 J1-32 J1-31 J1-30 J1-29 J1-28 J1-27 J1-26 J1-25 J1-24 J1-22 J1-21 J1-19 J1-18 J1-17 J1-16 J1-15 J1-14 J1-13 J1-12 J1-11 J1-10 J1-9 J1-8 Vcc +5V C12 PIC-CLK 2k2 R2 SICHER FUSS-B2 GND RES PIC-RTCC Vcc +5V FISCH-B1 MC-FREI GND 68nF 2k2 R23 IC17 RA3 RA2 4 3 6 14 16 18 20 22 24 26 28 30 32 34 36 38 40 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 RB7 RB6 RB5 RB4 RB3 RB2 RB1 Nr. 13 12 11 10 9 8 7 12 9 RB0 8 10 7 6 5 2 4 J1 3 1 PIC16C54 MCLR RTCC 15 OSC2 16 OSC1 2 1 17 RA0 18 RA1 F-GND J1-35 J1-33 J1-31 J1-29 J1-27 J1-25 J1-21 J1-19 J1-17 J1-15 J1-13 J1-11 J1-9 F-GND 2k2 R26 Vcc +5V nderung FISCH-A3 FUSS-A2 FUSS-B1 FUSS-A1 FISCH-A2 FISCH-B2 FISCH-B3 FISCH-A1 J1-40 F-GND J1-34 J1-32 J1-30 J1-28 J1-26 J1-24 J1-22 J1-18 J1-16 J1-14 J1-12 J1-10 J1-8 2k2 R25 Datum Name +24V J2/31C J2/30C J2/29C J2/28C J2/27C J2/26C J2/25C J2/24C SICHER J2/20C J2/19C J2/18C FISCH-A3 FISCH-B3 FISCH-B2 FISCH-A2 J2/13C J2/8C J2/7C J2/6C Vcc +5V 5 A23 A24 C23 C24 C32 Datum A32 A31 A30 C30 C31 A29 A28 A27 A26 C29 C28 C27 C26 Name RES J2/30A J2/29A J2/28A J2/27A J2/26A J2/25A J2/24A J2/23A FISCH-B1 FISCH-A1 FUSS-B2 FUSS-A2 FUSS-B1 FUSS-A1 J2/9A J2/8A J2/7A J2/6A GND Blatt 3 von 3 LP bs.: 30128-052 LP un.: 40128-026 Gepr ft Gezeich. 29.07.92 M.Fritz B A22 A25 A21 C22 C25 A20 C21 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 C20 C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 J2 MREQ INT DBUS RES ABUS CS10 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig Vcc +5V 180 / 266 34 36 38 31 33 35 37 D0 40 IORQ CS11 SIO-CLK DBUS GND D1 D7 D6 D3 A14 ABUS 30128-052 Zeichnungsnummer/DWG.NO CPU A1 A3 WR M1_PIO CS9 RD A12 Benennung/Title ICC Gert/UNIT GND 32 29 D2 39 28 27 D5 30 26 24 22 20 18 16 A15 23 D4 25 17 A11 19 A13 21 A0 15 A2 14 13 A4 A5 A7 12 8 10 6 11 4 5 A6 A9 2 3 J3 1 A10 7 A8 9 VNOT +5V Vcc J1/8 ICC 200, 300, 350 CPU PCB 30128-052 CIRCUIT DIAGRAMS ICC 200, 300, 350 Art. No. 80116-201 09 / 2004 CPU PCB (bare) 40128-026 5 CIRCUIT DIAGRAMS 181 / 266 5 CIRCUIT DIAGRAMS U_IN GND + R33 EN_5V GND GND $plname $plname GND + GND ec50r25 GND ec380_17 1000uF R34 30k 10k C51 2u2 ec380_17 + 1000uF R26 $plname ec50r25 30k + GND $plname 2 8 4 GND + GND BC557 T2 3 1 GND GND 8 4 14 GND SOFT VREF RD PFAIL C34 11 GND GND GND $rpname GND $plname GND GND FCOMP GND RESOUT GND OUT R OSC C L4972 GND FCOMP GND SOFT VREF RD GND $plname $rpname GND PFAIL 10 BOOTS FEEDB 17 18 L4972 $plname 22nF C40 $plname RESOUT IC6 INP SYNCIN VSTART 5 6 C39 7 $plname 22k R28 R25 $plname 10k C36 2u2 C37 ec50r25 2u2 C35 + + ec50r25 2u2 C38 15 11 16 $plname 330pF R27 10 $plname 36k 3 IC1 INP SYNCIN VSTART C49 7 $plname 14 R42 $plname 13 ec50r25 2u2 2 + + 15 C54 $plname 22nF 3 1 2n2 GND GND OUT GND R OSC C D2 U_IN BOOTS FEEDB 20 1 9 17 C55 U_IN C32 C47 D7 $plname 5V6 100R C52 ec50r25 2u2 C50 13 ec50r25 2u2 2 + ec50r25 2u2 5 6 C53 16 $plname 330pF R35 22k R36 $plname 36k 18 $plname $plname SB340 C41 R29 2n2 C42 GND 20 9 C17 $plname 470R 100nF 1nF $plname $plname GND D3 GND $plname UE1 SB340 C56 11 C57 5 Nr. GND GND 100nF 1nF $plname $plname 2 ec380_17 + 1000uF LED4 GND R14 $plname 470R 1 R49 $plname $plname rot 5k6 C12 $plname 8 2n2 R17 GND 14 OSC INP $plname 4k3 R12 $plname 4 GND GND GND GND GND Datum EN_5V 15 OUT 2 SOFT 12 13 GND 5 GND 15k C13 $plname 22nF 10 2u2 FEEDB C14 $plname $plname 4k7 $rpname $plname 9k1 C43 + ec50r25 GND L4962 $plname 4k7 c100 1uF C46 Name D1 + GND GND GND ec130r50 100uF C45 $plname Blatt 1 von 2 2k2 R23 18k $plname $plname 1.0 40121-060 LP bs.: 30128-410 GND Vcc +5V GND $plname $plname rot R22 Vdd +15V C28 MP4 GND $plname D6 $plname 2n2 MUR120 C67 GND $plname 220R R50 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig c100 1uF C29 + ec130r50 100uF C30 GND + ec130r50 100uF C31 + ec130r50 100uF 2 GND 3 30128-410 3k3 O Kleinsp.-Netzteil GND Zeichnungsnummer/DWG.NO G to220l -15V 79xx $plname $plname rot C62 + $plname 1uF LED1 -15V Vee GND Kleinsp.Netzteil I IC10 D5 1N4148 Benennung/Title R15 LED6 $plname 1 GND ICC 100nF +24V Gert/UNIT GND GND $plname 0.7 ec130r50 220uF C64 GND C63 + GND U_NEG 40121-060 20-07-94 J.Beller LP un.: Gepr ft R20 LED2 470R GND Name GND GND 100uH $plname 8 M.Fritz $plname 1nF 5 R18 LED3 $plname $plname rot 4k7 L1B Gezeich. 20-07-94 GND 0.7 GND $plname 100R + 100uF L1 13-09-95Datum A SB340 C26 L1A GND + 0.7 ec130r50 100uF C44 ec130r50 IC3 F.COMP $plname $plname + + 100uF 11 nderung 200uH L3 $plname 5 8 $plname 30121-037 R48 R31 7 GND 2 U_NEG R30 R44 R38 1k 4k7 C58 c100 1uF C59 ec130r50 100uF C60 R13 + ec130r50 100uF C61 ec130r50 182 / 266 R19 2k2 rot $plname $plname 0.7 Low Voltage Supply 30128-410 ICC 200, 300, 350 RESERVE TIMEROFF ALARM TON3 TON2 TON1 CS-TON RESET RESERVE TIMEROFF ALARM TON3 TON2 TON1 CS-TON RESET GND 68nF 10k R3 10k R2 C18 4 5 6 7 8 9 3 2 RN1 1D 1 R8 100k 40174 R C1 8*10k 14 13 11 6 4 3 9 IC9 200k TP4 1 R6 200k 100k TP3 200k 100k R4 GND GND Vdd +15V 15 12 10 7 5 2 GND Vdd +15V GND GND NE555 RES DCH THD OUT 3 TRG CV NE555 RES DCH THD OUT 3 TRG CV IC7 GND 5 2 6 7 4 GND 5 2 6 7 4 IC5 NE555 RES DCH THD OUT 3 TRG CV IC4 GND 5 2 6 7 4 MP3 MP2 MP1 4066 9 5 1 1 1 TON-CPU 6 IC8 1 4066 3 IC8 1 13 IC8 1 4066 2 8 4 1 R5 10k R24 10k R9 10k R7 10k R10 5k1 R16 Nr. 100k GND 4066 10 nderung 12 TP2 68nF C65 Datum 2 3 Name n.best BS170 T1 1 R11 R37 10k 68nF C66 C4 10nF C3 C5 68nF GND + Datum 6n8 C10 C11 20-07-94 J.Beller M.Fritz Name GND 68nF R39 Blatt 2 von 2 LP bs.: 30128-410 LP un.: 40121-060 Gepr ft Gezeich. 20-07-94 A GND n.best 1uF Vdd +15V R1 C2 C7 68nF 10nF C6 C8 10nF 51k TP1 2k2 C9 1 IC8 1 11 10nF 10nF 10nF 5k1 1 GND 3 U_IN GND GND 6 8 5 R21 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND 2 + TDA7052 IC2 Vdd +15V Vdd +15V C16 TON3 TON2 TON1 TON-CPU RESET CS-TON RESERVE TIMEROFF 4 3 2 1 5 4 3 2 1 J3 J2 J1 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 n.best 30128-410 Zeichnungsnummer/DWG.NO Kleinsp.Netzteil Benennung/Title ICC Gert/UNIT D4 MUR120 +24V GND Vdd +15V ALARM Vcc +5V Vee -15V +24V GND + CIRCUIT DIAGRAMS 3u3 5 n.best C1 Art. No. 80116-201 09 / 2004 ICC 200, 300, 350 Low Voltage Supply 30128-410 183 / 266 C18 RESERVE TIMEROFF ALARM TON3 TON2 TON1 CS-TON RESET RESERVE TIMEROFF ALARM TON3 TON2 TON1 CS-TON RESET GND 68nF 10k R3 10k R2 IC9 4 5 6 7 8 9 3 8*10k 1 15 14 GND GND Vdd +15V 12 13 2 10 11 RN1 7 40174 5 2 6 1D 4 3 R 9 C1 1 R8 200k 100k TP4 200k 100k R6 GND Vdd +15V GND GND IC4 IC7 NE555 RES DCH THD OUT 3 TRG CV GND 7 NE555 RES DCH 6 THD OUT 3 2 TRG 5 CV 4 GND 5 2 6 7 4 NE555 IC5 GND 6 7 RES DCH THD OUT 3 2 TRG 5 CV 4 10nF MP3 MP2 MP1 5 TON-CPU 6 IC8 1 1 4066 9 4066 3 IC8 1 1 13 IC8 1 1 4066 2 8 4 1 10k R24 10k R9 10k R7 R10 5k1 R5 10k R16 Nr. 100k GND 4066 10 nderung 12 R4 200k 100k TP3 68nF C65 Datum 2 3 Name n.best BS170 T1 1 R11 R37 TP2 C2 + GND Datum 6n8 C10 Name GND 68nF R39 C11 Blatt 2 von 2 LP bs.: 30128-410 LP un.: 40121-060 Gepr ft 20-07-94 J.Beller Gezeich. 20-07-94 M.Fritz A GND n.best 1uF 10k 68nF C66 C4 10nF 10nF 51k TP1 2k2 C9 1 IC8 1 11 10nF C6 C8 C3 C5 C7 68nF 5 68nF 5k1 1 GND 3 U_IN GND GND 6 8 R21 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND 2 + TDA7052 5 IC2 Vdd +15V Vdd +15V GND C16 4 3 2 1 5 4 3 2 1 J3 J2 J1 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 n.best 30128-410 Zeichnungsnummer/DWG.NO Kleinsp.Netzteil Benennung/Title ICC Gert/UNIT D4 MUR120 +24V TON-CPU RESET CS-TON RESERVE TIMEROFF ALARM TON3 TON2 TON1 Vee -15V Vdd +15V Vcc +5V +24V GND + 10nF 10nF 3u3 184 / 266 n.best Vdd +15V R1 ICC 200, 300, 350 Low Voltage Supply (bare) 40121-060 CIRCUIT DIAGRAMS C1 R57 11 68nF C12 10k 68nF Vee -15V 6 C11 - IC9 LM319 + R56 6 C8 - IC4 LM319 68nF Vee -15V GND C9 68nF 11 GND + D10 + IC9 LM319 - 1N4148 GND 9 10 Vdd +15V GND Vdd +15V GND GND + 11 68nF C18 GND - 6 C17 68nF Vee -15V GND + 7 12 IC14 LM319 Vdd +15V GND GND GND 8 GND GND 3 GND Vdd +15V GND GND GND 9 10 Vdd +15V + 2 1 3 4 5 R88 NT_EIN U_PRIM GND 7 Vdd +15V 4528 RX/ CX R CX & IC13 8 GND HF_EIN IC4 LM319 - Vdd +15V GND GND 9 10 Vdd +15V 100pF U_INP R52 Vdd +15V 1N4148 GND 1k 1k D11 R51 D12 R53 7k5 820R R59 10R 4k7 180R IC9 LM319 2n2 R50 4 C10 R60 R61 - 10k 560R 1k R58 R69 R68 R49 R48 9k1 C16 2k2 560R 2n2 5 R54 3 1 2 9 12 8 6 4 5 IPB 7 6 RCX CX G + IC14 LM319 - GND 7 GND GND 8 GND 11 Q Vdd +15V 4 5 GND + IC14 LM319 - 13 10 Q OSC OUT 4047 AST AST -TRIG +TRIG RTRIG MR RX IC18 D16 33k D14 Vdd +15V 12 Vdd +15V GND 3 GND GND S0 S1 4539 IB0 11 IB1 12 IB2 13 IB3 10 2 14 4 5 IA0 IA1 IA2 3 IA3 6 IC11 15 EB EA 1 GND GND 2 Nr. nderung B 3371 R12=10R C 3584 C37,C38=330pF GND 1k D17 Vdd +15V 1N4148 D15 3V6 D13 1 3 Vdd +15V OB 9 OA 7 R78 8k2 C28 R74 R75 4k7 R72 10k 10k R70 1N4148 3V6 R71 4k7 100R +15V Vdd 1N4148 Vdd +15V R76 Datum 11-94 30-1-96 GND T4 BS170 1k Vdd +15V Vdd +15V Name Fritz Fritz 2 1 3 4 5 2 1 3 4 5 & Datum 4528 RX/ CX R CX & IC16 4528 Blatt Hagg Fritz Name 2 1 2 1 3 3 GND 68nF C30 Vdd +15V Vdd +15V 68nF 14 15 13 12 11 14 15 13 12 11 14 15 13 & & & 12 13 9 10 9 10 9 10 MP2 30128-357 Zeichnungsnummer/DWG.NO CONTROL-BOARD Benennung/Title ICC Gert/UNIT 4528 RX/ CX R CX IC16 4528 4013 S C D R IC21 RX/ CX R CX IC17 GND 10 9 11 8 4528 RX/ CX R CX GND IC13 12 11 +15V C20 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 7 6 7 6 4030 =1 IC12 40128-095 30128-357 28-11-94 1 von LP bs.: LP un.: Gepr ft 100pF GND 4013 S C D R IC21 RX/ CX R CX IC17 GND 4 5 3 6 C15 Gezeich. 15.02.94 C GND EIN_AUS R67 1k TP13 R65 MP1 1k C19 R73 220pF R77 5k R81 5k6 C31 TP15 C22 470R 33pF 100pF 43k 1k R86 5k R80 20k C21 5k6 C32 CIRCUIT DIAGRAMS TP14 C29 33pF 33pF 5 100pF Art. No. 80116-201 09 / 2004 TSI AUS AN B A ICC 200, 300, 350 Control board 30128-357 185 / 266 U_INT U_NETZT IP_PAT UP_HF U_PHASE R26 3k3 5k6 R3 3k3 R6 3k3 R4 3k3 R11 10R GND GND GND GND 5k GND 5k 330pF GND GND GND R10 10k R7 10k R5 10k Vcc +5V Vcc +5V Vcc +5V GND GND GND 5 GND R25 68k IC2 LM324 - 3 + 2 RESET 1 GND GND CS_DAC1 DAC_A1 ANALOG_2 ANALOG_1 ANALOG_3 CS_DAC2 IC1 TL084 5k DAC_A0 1 7 14 15uF - 3 + 2 2k R22 IC1 TL084 - 5 + 6 2k R23 IC1 TL084 - 2k R36 GND D0-D7 GND D0-D7 LDAC WR CS RES D0 D1 D2 D3 D4 D5 D6 D7 Vcc +5V AD7224 17 14 15 16 6 7 8 9 10 11 12 13 IC8 19 GND 5 4 21 20 C3 23 C2 24 C1 1 C0 2 Vdd +15V 3 2n2 C7 Nr. nderung 4 5 GND GND T1 BC547 + Datum Name Fritz Fritz GND 4078 1 Datum 13 Vdd +15V Vdd +15V IPB 3 2 von LP bs.: Blatt Hagg Fritz Name 40128-095 30128-357 28-11-94 Vdd +15V LP un.: Gepr ft Gezeich. 15.02.94 C 12 11 10 9 5 4 3 IC5 GND 3 R38 12 MP5 GND 2 R79 IC4 LM319 - U_NETZT/2 U_INT_A 2 11-94 A GND 4 C24 B 3371 R12=10R D 1 2 1nF 30-1-96 MAX516 CS WR D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 IC6 GND A VOUT 18 FUNKE_AUS C 3584 C37,C38=330pF 7 8 9 10 11 12 13 14 15 16 17 18 GND 3 D 5 Vdd +15V 4k7 4 11 12 + 13 U_FUNKE/2 2k U_FUNKE GND TP2 STEUERBUS STEUERBUS R47 R44 Vee 68nF -15V R55 1k 10k GND + R12 TP3 TP4 TP1 1k C6 TP8 TP7 5k 5k n.best C37 C38 R1 330pF 5k1 D7 D5 D6 1N4148 1N4148 1N4148 R35 R24 R21 D9 3u3 4k7 R43 rot C1 + REF GND GND GND & 4528 RX/ CX R CX IC10 GND 5 2 AD654 DGND U F Fout IC15 1k 4528 RX/ CX R CX CT - CT RT Vin & IC10 6 7 3 4 + 8 2 1 Vdd +15V R83 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 14 15 13 12 11 2 1 3 4 5 GND 68nF C26 1nF - C36 2k 2k 1N4148 VCC ANA0 ANA1 ANA2 ANA3 3 1 4k7 D1 R62 R66 R84 TP17 4k7 C13 3k9 C14 2k C27 20k 2n2 2n2 R85 GND 10k + STE_EIN IC1 TL084 1 3 Vdd +15V 4 GND 12 11 10 9 5 4 3 2 4030 =1 4082 & IC7 4082 & IC7 12 13 IC12 TP16 10k D18 1N4148 13 1 11 1k C23 30128-357 Zeichnungsnummer/DWG.NO 9 8 MP3 GND CONTROL-BOARD Benennung/Title ICC Gert/UNIT 9 10 7 6 GND =1 4030 T5 BS170 5 6 C25 IC12 68nF Vdd +15V RESET C3 SICHER 68nF NT_EIN R82 186 / 266 33pF Vdd +15V EIN_AUS TSI_STE 4030 =1 IC12 ICC 200, 300, 350 Control board 30128-357 CIRCUIT DIAGRAMS TEMP RES_ANA2 RES_ANA1 I_HFL U_SYM U_NESSY IP_PAT_A UP_HF_A 3k3 R19 3k3 R15 3k3 R18 3k3 R13 100R R17 3k3 R9 3k3 R8 GND GND 750R TP5 TP6 GND GND GND GND GND GND GND GND n.best 4k7 180nF GND R29 IC2 LM324 - GND 10 + 9 5 + IC2 LM324 - C35 6 6k8 R28 8 7 Vee -15V 12k GND R31 Vdd +15V 16 17 18 19 20 21 22 23 2 3 4 5 6 7 8 9 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 1 15 13 14 11 10 1k R37 +24V GND R32 2k IC2 LM324 - 12 + 13 Z A0 A1 A2 A3 INH IC3 GND 4067 GND MUX_A3 MUX_A2 MUX_A1 MUX_A0 14 C2 U_INT_A GND 1nF Vcc +5V + 468nF C5 11C4 BER_2 BER_1 2k Nr. nderung 6 11 13 14 D2 D3 D4 D5 4 6 11 13 14 D1 D2 D3 D4 D5 Datum Name Fritz Fritz 500R 500R TP12 TP11 40174 28-11-94 Hagg Fritz Name U_NETZT FUNKE_AUS BER_2 BER_1 MUX_A3 MUX_A2 MUX_A1 MUX_A0 DAC_A1 DAC_A0 Blatt 3 von LP un.: 3 40128-095 LP bs.: 30128-357 Gepr ft Gezeich. 15.02.94 Datum 1N4148 68R C 1N4148 D3 D2 15 12 10 7 5 2 15 12 10 7 5 2 100R R46 R45 1D R C1 IC20 40174 R C1 1D ANALOG_4 3 D0 9 1 4 3 9 1 D1 D0 T2 BC547 11-94 1 T3 BC338 2 MP4 B 3371 R12=10R 2 Vdd +15V 3 RESET CS_DFF2 30-1-96 10k R63 10k R64 8 RESET CS_DFF1 8V2 C 3584 C37,C38=330pF GND GND GND R33 IC1 TL084 - 10 + 9 Vee 68nF -15V - IC2 LM324 Vdd +15V R34 U_NETZT/2 1N4148 R27 10k R30 2k STEUERBUS STEUERBUS U_FUNKE/2 D4 5k 5k 5k 5k1 5k R2 TP9 R14 4k7 R39 R40 TP10 R16 R20 10k 2k R41 R42 3k3 3k3 10k 2k 3 CIRCUIT DIAGRAMS 1 Vee -15V GND 0.6 9 8 7 6 5 4 3 2 Vcc +5V RN2 D0 D7 D6 D5 D4 D3 D2 D1 2 9 8 7 6 5 4 3 8x10k RN1 30128-357 Zeichnungsnummer/DWG.NO 1 Vdd +15V U_NESSY U_SYM U_FUNKE U_NETZT U_INT U_INP AUS AN B A TSI TEMP STE_EIN HF_EIN NT_EIN SICHER ANALOG_4 ANALOG_3 ANALOG_2 CONTROL-BOARD Benennung/Title ICC Gert/UNIT R87 1 Vdd +15V B32 B31 A31 A32 B30 A30 B26 A26 B29 B25 A25 A29 B24 A24 B28 B23 A23 A28 B22 A22 B27 B21 A21 A27 B20 A20 B16 B19 A16 D6 B15 B18 A15 D5 B14 B17 A14 D4 B13 A19 A13 D3 B12 B11 A18 A12 D2 B10 A17 A11 D1 D7 A10 0.8 ANALOG_1 Vcc +5V B9 A9 D0 A7 Vdd +15V +24V B8 B7 A6 A8 B5 Vee -15V 0.6 B6 B4 B3 A3 A5 B2 A2 A4 B1 A1 J1 C34 GND C33 3u3 + 3u3 MP6 + 8x10k 10k Vdd +15V +24V Vdd +15V Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig STE_EIN SICHER HF_EIN NT_EIN CS_DFF2 CS_DFF1 CS_DAC2 CS_DAC1 RESET U_PHASE UP_HF_A UP_HF IP_PAT_A IP_PAT RES_ANA1 RES_ANA2 I_HFL TSI_STE U_PRIM CS_DFF2 CS_DFF1 CS_DAC2 CS_DAC1 RESET STEUERBUS 5 STEUERBUS Art. No. 80116-201 09 / 2004 ICC 200, 300, 350 Control board 30128-357 187 / 266 D8 R89 ICC 200, 300, 350 Control board (bare) 40128-095 188 / 266 5 CIRCUIT DIAGRAMS GND 9 8 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 C12 4081 & IC4 + 10 Vdd +15V 9 GND 13 12 1 3 GND 2 11 4 4081 & IC4 6 A5 GND 8 A4 5 7 11V D11 6 5 1 2 R7 A3 4 3 Vdd +15V 4081 & IC4 4081 & IC4 2 100k A2 GND 68nF 5 6 13 12 9 8 1 2 GND 3 100k D12 R8 BC557 1N4148 T11 1 C7 1k 4011 & IC1 4011 & IC1 4011 & IC1 4011 & IC1 4 11 10 3 GND 1 1 15 12 10 6 4 2 2 4 6 15 10 Vdd +15V 4049 14 4049 IC3 1 4049 IC3 1 IC3 4049 1 4049 IC3 1 4049 IC3 1 IC3 4049 1 4049 IC2 1 4049 IC2 1 IC2 4049 11 9 7 5 3 3 5 1 4049 IC2 14 7 1 4049 IC2 11 9 GND IC2 12 +15V GND 2 2 2 2 GND Nr. 2 T6 VN10KM GND 2 T10 VN10KM GND 2 T7 VN10KM GND 2 T3 VN10KM GND nderung T5 VN10KM GND T9 VN10KM GND T8 VN10KM GND T4 VN10KM R3 R5 A1 + 3 3 GND Datum D7 1N5346 Name Datum Name 40128-127 30128-528 1 von 1 Blatt LP bs.: LP un.: Gepr ft C2 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig IRFP460 T2 IRFP460 T1 Gezeich. 11-12-95 M. Hagg B 1N5346 MUR120 D5 D6 MUR120 30128-539 2 1 UE2 Vdd +15V GND D8 MUR120 D10 D9 MUR120 30128-539 2 1 UE1 Vdd +15V R2 R1 J1 C10 2k2 C5 2k2 C4 +15V 1uF MUR860 MUR860 C6 C11 D3 D4 68nF 68nF 3u3 1 3 1 3 1 3 1 3 22nF 22nF D1 D2 1 3 1 3 1 3 1 3 + + 150R 150R R4 R6 C8 150R 150R C9 CIRCUIT DIAGRAMS 3u3 MUR860 5 MUR860 Art. No. 80116-201 09 / 2004 C1 C3 30128-528 Zeichnungsnummer/DWG.NO QC Power Stage Benennung/Title ICC Gert/UNIT 1uF MP2 MP1 2 1 2 1 J3 J2 ICC 200, 300, 350 QC Power Stage 30128-528 189 / 266 1uF u68 R9 8*10k RN1 3u3 ICC 200, 300, 350 QC Power Stage (bare) 40128-127 190 / 266 5 CIRCUIT DIAGRAMS TSI A9 A8 A7 A6 A5 A4 A3 A2 A1 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 J1 QKE2 J4 1 $plname c430 U-NETZT U-INT U-INP U-PRIM TSI TEMP NTE GND 1.0 9n5 Vdd +15V $wert $plname R17 GND 52uH REL1 4 2 2 12 30121-073 $plname 1 3 $plname UE3 GND IC2 7667 IC2 7667 $plname 2 4 $rpname C17 $rpname $plname $rpname $plname D5 L2 5 7 R13 1N4148 $plname 1k R14 r150 GND r150 C15 1k Vdd +15V $wert $plname R18 GND MUR860 d50b10skk D4 MUR860 0.8 u68 c150 GND ec150r T2_TSI Vdd +15V 30k $plname R2 22uF R4 ec150r d50b10skk C16 QKE1 $plname REL1 U-INP C4 C10 R11 + $plname 22uF R6 2k 47k 47k $plname + $plname U-INT 10 r200 R5 GND $plname $plname GND-STE c225_11 GND GND $rpname Nr. nderung Datum 22-1-96 17-7-95 GND C 3570 s.Anderungsmitt. GND $plname D 3696 s.Anderungsmitt. 19-11-97 9V1 $plname R12 BUZ74 GND 68nF D1 $plname 10k C3 1206 C6 T3 TEMP NTC1 10k $plname R10 Vdd +15V 0R47 R9 ec130r 9 10k + 10uF + REL1 U-NETZT 1 r150 U-PRIM Name Fritz Fritz c225_11 c100 U-NT-STE C12 2 1k R15 + $plname NTE 0.47uF 330R C14 C11 C18 D2 C13 10uF 1uF BA159 $plname C7 R7 1nF R8 c380 $plname 68nF C5 470k 200k $plname 10nF 150pF R3 IC1 7667 4 $rpname $plname $rpname $plname Datum IC1 7667 2 c100 $plname 5 7 3R3 $plname R1 158uH $plname L1 Name Blatt LP bs.: LP un.: Gepr ft 1 von 1 40128-117 30128-478 40128-117 31-05-95 M. Hagg GND R19 T2_TSI GND-STE U-NT-STE IRFP450 $plname T1 1n5 c225_6 C1 3R3 $plname $plname T2 MP3 MP4 1 1 2 3 4 5 J3 $plname 5 4 3 2 1 J2 $plname Power-Module 30128-478 Zeichnungsnummer/DWG.NO Power-Module Benennung/Title ICC Gert/UNIT MP1 MP2 2.0 U-HF-NE U-HF-AE IRFP450 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig Vdd +15V Gezeich. 31-05-95 M.Fritz D 51k GND $plname 2 30128-044 1 UE1 C2 R16 150pF 1k D3 C9 $plname C8 $rpname 3u3 7 68nF UE2 $plname ec130r + $plname m3schraub 3 r150 3u3 $plname TSI + $plname J14 C28 CIRCUIT DIAGRAMS $plname 22nF 5 c150 Art. No. 80116-201 09 / 2004 ICC 200, 300, 350 Power Module 30128-478 Power Module (UL) 30128-492 191 / 266 ICC 200, 300, 350 Power Module (bare) Power Module UL (bare) 40128-117 192 / 266 5 CIRCUIT DIAGRAMS D1 D2 D3 D4 D5 D6 D7 A11 A12 A13 A14 A15 A16 A17 GND 0.8 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 D0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A10 J1 0.6 RESET CS5 CS3 BUS TSI-STE F-ST CS5 RESET CS3 +24V GND Vdd +15V BUS CS5 RESET GND 68nF SG 14 13 11 6 D3 D4 D5 9 8 7 6 5 3 4 8x4k7 RN1 4 D2 2 3 D1 9 1 D0 BUS TSI-STE 4 5 6 7 8 9 D2 D3 D4 D5 D6 D7 1 1D RN2 11 10 Vdd +15V 7 10 12 15 5 2 8x10k 40174 R C1 IC6 3 2 D1 D0 AUS MP3 1 14 GND 10 7 9 11 8 12 6 15 16 ULN2004A 13 GND 5 2 1 4 3 AUS 3 2 1 15 14 12 13 6 4 5 7 9 IC7 Q1 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Vdd +15V 4020 R CLK IC1 MP1 F-ST B Nr. REL19 REL3 REL2 REL1 1 1 SG Vdd +15V REL19 GND nderung R1,R2 neu hinzu +24V J2 J3 REL19 C9 GND Datum Name 5 IC4 7667 1 7 Fritz J14 2 3 B D4 150pF D1 10R R3 1N4148 11N80 T1 GND Datum MUR860 Name GND L1 Blatt 1 von 1 LP un.: 40128-129 LP bs.: 30128-555 Gepr ft Gezeich. 15-03-96 M.Fritz C3 IC4 7667 12-8-96 4 2 GND u33 + C4 68nF C10 C6 +15V Vdd 3u3 CIRCUIT DIAGRAMS C5 5 6n8 Art. No. 80116-201 09 / 2004 GND 2 1nF C2 REL1 REL2 REL3 3 2 1 1 1 1 2 3 J7 J6 J5 J4 30128-555 Zeichnungsnummer/DWG.NO ST-Power-Stage Benennung/Title ICC Gert/UNIT REL1 4k7 REL2 R1 4k7 R2 C1 1nF Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 1 UE1 REL3 NE AE ICC 200, 300, 350 ST Power Stage 30128-555 193 / 266 ICC 200, 300, 350 ST Power Stage (bare) 40128-129 194 / 266 5 CIRCUIT DIAGRAMS AE NE_NESSY 2 AE 2 3 REL2 5 J9 3 4 FROM GENERATOR 1 REL1 REL1 3 NE 1 2 REL2 REL3 REL3 J7 J2 NE C1 J10 1 150pF J8 UE1 2 2 100:8 1 UE2 1 1:50 GND MP1 GND GND R20 10k 68nF C12 68nF Vee -15V 6 IC3 LM319 11 + GND GND R22 7k5 Vdd +15V C11 GND R17 18k 1k GND GND GND GND 3M3 GND Vdd +15V Vee -15V 4 5 68nF 4 68nF Vee -15V 11 C31 - IC8 TL084 + + GND GND 8 GND GND 3 GND GND IC3 LM319 - Vdd +15V C32 GND 9 10 + IC3 LM319 - R23 7 12 Vdd +15V 2 Nr. D21 1N4148 1N4148 D20 GND GND T3 BS170 Vee -15V 1 3 C27 TEILER nderung B 4343 C39 neu hinzu 7k5 560R MONO AE D16 D19 3 2 GND 2k R47 D31 R25 Datum 12-1-98 GND GND GND GND Name Fritz GND D32 GND GND GND 4 C15 - 8 Datum 4k7 R55 68nF 5 OFF TZ 1 68nF C14 1N4148 D10 8 1 GND 6 GND GND 6 GND Blatt LP 12.08.96 Fritz Fritz Name 1N4148 D23 1 von 3 GND GND GND GND GND GND IC8 TL084 - R62 IC8 TL084 750R R37 - 9 - 6k8 R39 8 1 30128-561 Zeichnungsnummer/DWG.NO SENSO-BOARD Benennung/Title ICC 10k R51 7 R63 6k8 TL084 IC8 10 + 2 10k R50 14 TL084 IC8 3 + Gert/UNIT 5 + 6 - 12 + 13 750R Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig U_PHASE R54 1k R52 7k5 R48 1k R36 7k5 1N4148 D27 40128-130 bs.: 30128-561 LP un.: Gepr ft Gezeich. 12.08.96 B GND C29 5 OFF TZ 1 68nF TL084 IC9 3 + Vee -15V 3 + - 2 7 4 IC4 AD844 -+ Vdd +15V Vee -15V 2 7 68nF C28 1N4148 IC7 AD844 -+ 3 + - 2 Vdd +15V D26 R49 R53 R21 D33 R67 BIPOLAR NE AE 1 R11 R15 R16 1k R12 2k 2k D17 R74 D18 1N4148 1N4148 15V 10k J5 J3 J1 R14 R13 10k 10R D22 R38 220pF 1N4148 470R R24 1k3 2k D28 R40 C13 1M C30 1M C33 1nF 1nF 1N4148 2k 1N4148 u22 D29 R65 CIRCUIT DIAGRAMS 4k7 R61 R64 5 GND 4k7 GND 4k7 Art. No. 80116-201 09 / 2004 UP_HF_A UP_HF IP_PAT_A IP_PAT ICC 200, 300, 350 Senso-board 30128-561 195 / 266 NE 3u3 + GND R34 D25 R4 C26 R5 Vdd +15V 750k GND C25 750k IMAS 15V D2 GND + 15V D1 1uF R2 R6 2 10k GND 1 T6 BC547 3 Vdd +15V R7 10k 150k 750k 1k 3V C5 C24 C23 R35 UE6 4 IC2 TL082 2 12:16 1 3 + 8 + I+9 I-9 GND IC2 TL082 - D6 D4 1N4148 1N4148 R9 IMAS 10R 5 + 6 IMAS I+9 R3 R1 1uF 10nF R8 10nF 2n2 56R 1k C8 + 750k C9 C10 18pF 18pF 7 1nF C7 9V1 AE 1 3 1 2 9 12 8 6 4 5 4047 RCX CX AST AST -TRIG +TRIG RTRIG MR RX IC1 G 11 Q 7 IMAS I-9 I+9 13 10 Q OSC OUT 14 5 Nr. nderung B 4343 C39 neu hinzu + IC2 TL082 D3 C6 I+9 IMAS - 1uF D5 2 Datum 12-1-98 2 2 Name Fritz 3 T1 VN10KM 1 3 Blatt 2 von LP un.: 3 40128-130 LP bs.: 30128-561 Gepr ft Fritz 3 12.08.96 Name 8:8:8 2 1 UE5 Fritz Datum 220pF Gezeich. 12.08.96 B C4 T2 VN10KM 1 IMAS R10 GND 10nF 0R R32 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND 1N4148 D15 C22 196 / 266 9V1 1k 22k 11 Vee -15V - IC9 TL084 + Vdd +15V 4 7 GND 4k7 R58 30128-561 Zeichnungsnummer/DWG.NO SENSO-BOARD Benennung/Title ICC Gert/UNIT GND - IC9 TL084 5 + 6 U_FUNKE ICC 200, 300, 350 Senso-board 30128-561 CIRCUIT DIAGRAMS R33 R18 Vee -15V Vdd +15V GND 2 2 2k4 R19 OSZI_DIS 3 BC557 T5 1 1 T4 BC547 3 C19 GND C17 2k4 1nF C39 C37 3m3 150R 2 1nF C16 9:7 1 R30 2 10k GND 220pF L1 10nF R29 3u3 R41 C2 1 1 7 T7 BS170 GND GND 2 Vee -15V Vdd +15V GND 3 R28 2k4 4k7 GND 1 3 GND 4 68nF C21 2 3 Vee -15V + - 4 T8 BS170 B B/S 5 6 - 8 + LM311 IC6 1 5 IC5 B/C1 C2 LM318 B/C3 -+ Vee -15V Vdd +15V C18 7 68nF 3 + - 2 Vdd +15V 3 8 2:2:15 2 1 UE3 L2 GND GND 6 GND C38 2n2 R31 1N4148 R42 R43 C3 5k6 D24 u1 R72 12k 10k GND 100R R60 1k 100uH R73 68nF NE D9 1N4148 D30 1N4148 GND 10k R26 GND R27 GND 1k - Nr. 12-1-98 R56 3k GND 8 nderung Datum Name Fritz 15 TEILER Blatt 3 von LP un.: 3 40128-130 LP bs.: 30128-561 Gepr ft Fritz Name R70 +24V 2 Vcc +5V 1 2 Vdd +15V GND 1 T10 BC547 3 Vdd +15V Vee -15V A11 A12 A13 A14 A15 A16 A17 D3 D4 D5 D6 D7 30128-561 Zeichnungsnummer/DWG.NO A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A10 D2 J6 D1 A9 A8 A7 A6 A5 A4 A3 A2 A1 D0 GND SENSO-BOARD Benennung/Title ICC Gert/UNIT T9 BC547 GND 1 IP_PAT IP_PAT_A UP_HF UP_HF_A U_PHASE U_NESSY U_SYM U_FUNKE STEUERBUS 3 GND +24V Vee -15V T11 BC547 2 1N4148 GND 3 REL2 D14 D13 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 10k 10k R68 10k R69 OSZI_DIS 12.08.96 Datum 40174 12 10 7 5 2 Fritz 1D R C1 IC10 U_NESSY U_SYM Gezeich. 12.08.96 B 14 11 D3 D5 6 D2 13 4 D1 D4 3 D0 9 Vdd +15V 14 GND 9 - TL084 IC9 10 + 1 13 TL084 IC9 12 + GND B 4343 C39 neu hinzu STEUERBUS C34 3 2 D0 J4 3 D1 2 4 D2 UE4 R46 5 D3 10k 10k R45 C57 6 D4 R57 7 D5 C20 5k6 1uF 8 68nF R59 + 1 3k 8x10k 9 + + 1 R66 D6 R44 30k RN1 4k7 D7 u1 R71 10k 1N4148 C36 C35 NE_NESSY 1k REL3 D7 CIRCUIT DIAGRAMS 1N4148 3u3 3u3 5 REL1 Art. No. 80116-201 09 / 2004 ICC 200, 300, 350 Senso-board 30128-561 197 / 266 + ICC 200, 300, 350 Senso-board (bare) 40128-130 198 / 266 5 CIRCUIT DIAGRAMS CIRCUIT DIAGRAMS nderung Datum QK-Endstufe J5 J4 2 1 2 1 Name J1 J2 J6 5 Nr. Mainboard Art. No. 80116-201 09 / 2004 Datum Name J3 17-05-95 M.Hagg Blatt 1 von 1 LP bs.: 30128-479 LP un.: 40128-118 Gepr ft Gezeich. 17-05-95 M.Fritz A 1 2 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig Power-Module 30128-479 Zeichnungsnummer/DWG.NO Upper Wiring Module Benennung/Title ICC Gert/UNIT ICC 200, 300, 350 Upper Wiring Module 30128-479 199 / 266 ICC 200, 300, 350 Upper Wiring Module (bare) 40128-118 200 / 266 5 CIRCUIT DIAGRAMS PCBs only for ICC 200 202 / 266 5 CIRCUIT DIAGRAMS 5 CIRCUIT DIAGRAMS RESET PSD1 PSD3 PSD5 PSD7 EIN11 EIN10 EIN9 EIN8 EIN7 EIN6 EIN5 EIN4 EIN3 EIN2 EIN1 ANALOG-4 ANALOG-3 ANALOG-2 ANALOG-1 GND +24V +24V C31 C32 A32 C30 C29 C28 C27 C26 A31 A30 A29 A28 A27 A26 C25 24V-TR PSD0 PSD2 PSD4 PSD6 EIN23 EIN22 EIN21 EIN20 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A25 SICHER C23 A23 C24 A22 C22 A22 A24 A21 C21 A20 A19 A18 A17 A16 A21 EIN19 EIN18 EIN17 EIN16 EIN15 C20 C19 C18 C17 C16 EIN14 A15 A20 A19 A18 A17 A16 C15 A14 A13 A15 EIN13 C13 A13 EIN12 A12 C12 A12 C14 A11 C11 A11 A14 A10 A9 A8 C10 C9 C8 A10 A9 A8 SET A6 A7 A5 CS C6 C7 C5 A6 A7 A5 Vcc +5V 24V-TR I-HFL U-PHASE UP-HF-A UP-HF IP-PAT-A IP-PAT RES-ANA1 RES-ANA2 I-HFL TSI-STE U-PRIM CS5 CS4 CS3 CS2 RESET CS1 RESET ESD6 ESD7 ESD6 ESD5 ESD5 ESD7 ESD2 ESD3 ESD4 ESD3 ESD4 ESD1 ESD1 ESD2 ESD0 Vcc +5V Vee Vdd +15V -15V ESD0 Vee Vdd -15V +15V GND Nr. A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 nderung RN18=2k2 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 A5 A6 B4 A4 B3 +24V GND Vcc +5V Datum 8-93 U-NESSY U-SYM U-FUNKE U-NETZT U-INT U-INP AUS AN B A TSI TEMP STE-EIN HF-EIN NT-EIN SICHER ANALOG-4 ANALOG-3 ANALOG-2 ANALOG-1 Vee Vdd -15V +15V MF +24V GND Name AUS AN B A ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Datum Vcc +5V Vee Vdd -15V +15V Name Blatt LP un.: 1 von 5 40128-025 LP bs.: 30128-033 Gepr ft Gezeich. 25-05-92 M.Fritz B A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 +24V GND Vcc +5V U-NETZT U-INT U-INP U-PRIM TSI TEMP REL-NT NTE ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 GND Vcc +5V 30128-033 Zeichnungsnummer/DWG.NO Motherboard 200 Benennung/Title TSI-STE F-ST CS7 RESET CS6 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V +24V ICC 200 Gert/UNIT A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A4 C4 A4 A3 A1 GND A3 C3 A3 GND A2 A2 B2 A2 J6 A1 A1 B1 A1 A2 J5 ST-Endstufe A1 J4 Leistungsteil C2 J3 QK-Endstufe C1 J2 Control-Board A2 Vcc +5V Kleinspannung+Ton A1 J1 CPU Art. No. 80116-201 09 / 2004 ICC 200 Motherboard 30128-033 203 / 266 Vcc +5V 5 CS12 CS11 RESET ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 -15V Vee RES-ANA2 RES-ANA1 Vdd +15V A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 +24V GND Vcc +5V 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 4 3 5 2 1 J9 IP-PAT IP-PAT-A UP-HF UP-HF-A U-PHASE U-NESSY U-SYM U-FUNKE RESET CS8 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V +24V GND 9 GND RES-F5 RES-F4 RES-F3 RES-F2 RES-F1 RES-B6 RES-B5 RES-B4 RES-B3 RES-B2 RES-B1 FING-B3 FING-A3 Vdd +15V 10 8 6 7 4 FING-B1 Vcc +5V Vdd +15V Vcc +5V SET PSD3 PSD2 PSD1 PSD0 CS Vcc +5V RESET C24 10k R2 10k R1 Nr. nderung RN18=2k2 0 1 2 3 1 C20 4 5 2 20D 0 6 3 0 7 G 21 15 8 22 3 9 10 23 EN 11 12 13 14 15 4514 DMUX IC4 15 16 13 14 19 20 17 18 4 5 6 7 8 10 9 11 Datum 3 8 Name MF 4 9 RN8 8-93 1 Vcc +5V 8*10k Datum C4 IC10 Name CS14 C3 Blatt LP 2 von 5 40128-025 bs.: 30128-033 LP un.: Gepr ft Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 10 7 CS13 11 6 GND 12 5 9 13 4 15 14 8 ULN2004A 3 2 16 10 7 IC11 11 6 1 12 5 GND 13 9 14 15 16 4 8 ULN2004A 3 2 1 GND 68nF GND 68nF Gezeich. 25-05-92 M.Fritz B 5 7 68nF GND 7 5 FING-A1 8 4 2 2 5 J8 9 3 1 3 -15V +24V Vee GND +24V RELAIS 8*10k 2 A3 RN16 A2 2 2 A1 3 3 J7 4 4 RN15 5 5 Vdd +15V 6 6 Vcc +5V Vdd +15V Vdd +15V 7 CS12 CS11 CS10 CS9 CS8 CS7 CS6 CS5 CS4 CS3 CS2 CS1 30128-033 Zeichnungsnummer/DWG.NO Motherboard 200 Ton J2 RESET Benennung/Title ICC 200 Gert/UNIT 7 Vcc +5V 8 1 1 Vcc +5V 8*10k 8*10k Mono-Output-Board 1 6 6 RN9 9 8 204 / 266 9 Senso-Board ICC 200 Motherboard 30128-033 CIRCUIT DIAGRAMS J12 1 C32 6 u022 GND 1 1 R5 100R J19 J21 J17 J22 J18 1 F1 T200mA 1 1 1 J20 24V TR1 J16 Sek. 1 - ~ ~ 5 - J15 1 BH37933 + BR1 C6 Nr. B250C5000 + BR2 C7 REL1 D1 + nderung 2 3 6 Datum 8-93 J14 Name MF Leistungsteil D2 24V-TR RN18=2k2 GND 3k6 $wert 1N4148 R3 u68 2 + + RLV 680uF R6 680uF R9 +24V Datum Name GND 68nF Blatt 3 von 5 LP bs.: 30128-033 LP un.: 40128-025 Gepr ft Gezeich. 25-05-92 M.Fritz B Vee -15V C11 REL1 68nF C9 MASSE Vdd +15V GND GND Vcc +5V C23 C22 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND Vdd +15V 68nF 1 Gehuse J11 u022 C33 0.5 +24V GND C10 C8 3 2 1 1 J13 Vcc +5V GND 0.5 0.5 30128-033 Zeichnungsnummer/DWG.NO Motherboard 200 Benennung/Title ICC 200 Gert/UNIT J10 Frontplatte GND 68nF REL1 Prim.1 Prim.2 ~ ~ 22k 22k C5 C15 CIRCUIT DIAGRAMS 1000uF 68nF 5 68nF Art. No. 80116-201 09 / 2004 ICC 200 Motherboard 30128-033 205 / 266 SICHER CS14 CS13 RESET Vcc +5V GND 3 Vcc +5V GND 7 10 12 15 6 11 13 14 40174 5 1D R C1 4 3 9 1 1N4148 2 15 14 IC3 12 13 D4 10 11 40174 7 6 2 5 1D R C1 IC2 2k2 4 3 9 1 1N4148 D3 $wert R10 Vdd +15V RN7 D8 Nr. 2 2 PSD7 8 8 PSD6 7 7 RN6 6 6 PSD5 1 1 PSD4 5 5 PSD3 Vcc +5V Vcc +5V nderung RN18=2k2 3 3 PSD2 8*10k 8*10k PSD1 C1 9 9 RN5 2 IC7 Datum 8-93 Name MF 10 7 GND 11 6 9 12 5 8 13 4 15 14 ULN2004A 3 2 16 10 7 IC9 11 6 1 12 5 GND 13 9 14 15 16 4 8 ULN2004A 3 2 IC8 10 7 1 11 6 GND 12 5 9 13 4 15 16 14 8 ULN2004A 3 2 1 Datum Vdd +15V Vdd +15V Name Vdd +15V Blatt LP un.: 4 von 5 40128-025 LP bs.: 30128-033 Gepr ft Gezeich. 25-05-92 M.Fritz B RN12 2 RN14 1 1 1 PSD0 68nF 5 68nF 4 4 3 3 2 RN13 4 3 4 5 4 5 6 5 6 7 6 7 8 7 8*10k 8*10k Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 8*10k 8 2 8 9 9 9 206 / 266 30128-033 Zeichnungsnummer/DWG.NO Motherboard 200 Benennung/Title ICC 200 Gert/UNIT SICHER STE-EIN RLV RELAIS REL-NT RES-F5 RES-F4 RES-F3 NTE RES-F2 RES-F1 NT-EIN HF-EIN ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 ext. Steuerbus Signalleitungen GND ICC 200 Motherboard 30128-033 CIRCUIT DIAGRAMS 9 8*4k7 8 7 6 5 4 1 C2 PIO-Ausgnge J25 J24 RES-B3 RES-B2 RES-B1 F-ST 3 2 1 3 2 1 680R 680R R19 R13 680R 680R R16 R11 FuÆschalter 2 680R R18 Vdd +15V 680R R17 Vdd +15V 7 680R R15 680R GND GND GND 1 680R R14 8 C17 C19 C20 3 68nF C16 68nF C18 Vdd +15V 3 5 GND 68nF FING-A3 FING-B3 GND 68nF 3 GND 9 3 9 7 11 5 14 2 4 4050 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 IC1 2k2 2 10 6 12 4 15 9 7 5 11 14 3 4050 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 IC13 10 6 4 12 15 2 5 3 Vcc +5V 8*10k Nr. RES-B6 FUFI-A3 nderung RN18=2k2 EIN12 EIN11 EIN10 EIN9 EIN8 EIN7 EIN22 Datum RES-B5 FUFI-B3 MF FUSS-B2 FUSS-A2 8-93 FUSS-A2 FUSS-B2 Name 6 6 1 1 4 4 3 3 2 2 Name GND RN11 Blatt 5 von 5 LP bs.: 30128-033 LP un.: 40128-025 Gepr ft 9 9 8*10k 8*10k 4050 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 IC6 4050 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 IC5 10 6 12 4 2 15 10 6 12 4 2 15 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 9 7 11 5 3 14 9 7 11 5 3 14 1 1 RN4 RN17 7 2 1 Vcc +5V Vcc +5V 30128-033 Zeichnungsnummer/DWG.NO Motherboard 200 Benennung/Title ICC 200 Gert/UNIT 2 2 RN10 5 5 Datum 7 7 Gezeich. 25-05-92 M.Fritz B FUFI-A3 FUFI-B3 FING-B1 FING-A1 FUSS-B1 FUSS-A1 EIN21 FUSS-A1 FUSS-B1 3 3 RN18 2 68nF 4 68nF C21 6 7 8*10k 2 RN1 Vdd +15V 4 R12 5 1 5 7 8*10k J23 4 4 RN3 5 5 GND 8 8 FuÆschalter 1 RN2 9 6 6 Vdd +15V 9 GND 2 8 8 7 7 CIRCUIT DIAGRAMS 3 8*10k 8*10k 8 1 6 5 9 Art. No. 80116-201 09 / 2004 EIN16 EIN15 EIN14 EIN13 EIN6 EIN5 EIN23 EIN18 EIN17 EIN4 EIN3 EIN2 EIN1 EIN20 EIN19 ICC 200 Motherboard 30128-033 207 / 266 9 8 6 4 9 8 6 1 ICC 200 Motherboard (bare) 40128-025 208 / 266 5 CIRCUIT DIAGRAMS GND 0.9 0.6 Vdd +15V C5 9 GND Vdd +15V 10 8 6 GND Vdd +15V GND GND GND Vdd +15V 2 FING_B1 Vdd +15V 3u3 4 T1 7 Vdd +15V GND 3 1 2 9 14 15 13 12 11 12 8 6 4 5 GND & + 2 C4 3u3 G 4528 D8 Q Q OSC OUT 4047 RX/ CX R CX IC3 RCX CX AST AST -TRIG +TRIG RTRIG MR RX IC2 GND 1 T2 BC517 3 RELAIS +24V 1N4148 13 11 10 9 10 GND 1 3 C3 10:10:32 2 T1 BC517 3 UE2 1 Vdd +15V 1nF 5k1 R6 2 1 3 4 5 Vdd +15V & 13 12 9 8 4011 & 4011 IC5 & Nr. nderung J2 R2 J1 Datum 1 2 3 3 2 1 Name Fritz Fritz 11 10 150R IC5 GND 22.6.94 1k R8 14.7.94 7 6 SFH450 IC1 C2 B 3192 C11=10nF D5 11V 100pF C 3252 s.Aenderungsmit. 4528 RX/ CX R CX IC3 R4 R3 REL1 D9 R10 680R 5 T2 D3 D4 3 D10 R11 SD101A 4k7 R7 REL1 C 2 1 5 6 3 4 E Datum 4011 & 4011 IC5 & Vdd +15V IC5 T2 T1 R9 Blatt LP bs.: LP un.: Gepr ft 5k1 Hagg Fritz Name GND UE1 1 von 1 40128-096 30128-358 14-07-94 Gezeich. 17-02-94 C Vdd +15V 56R R1 REL1 10nF FING_A1 B 2 4k7 68nF SD101A 4k7 +24V J5 68nF C10 IC1 SFH350 1 C7 D6 D7 6 4013 S C D R IC4 4013 S C D R IC4 C11 12 13 2 1 BA159 BA159 D1 D2 10nF Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND 10 9 11 8 4 5 3 3 1 RELAIS C1 + R5 68nF 6n8 1N4148 1N4148 1N4148 1N4148 C9 510R +15V Vdd CIRCUIT DIAGRAMS 10k C6 10nF 4 5 2 Art. No. 80116-201 09 / 2004 J4 J3 ICC 200 30128-358 Zeichnungsnummer/DWG.NO Mono-Output-Board Benennung/Title Gert/UNIT FING_B1 FING_A1 3 2 1 3 2 1 ICC 200 Mono Output 30128-358 209 / 266 C8 ICC 200 Mono Output (bare) 40128-096 210 / 266 5 CIRCUIT DIAGRAMS PCBs only for ICC 300 212 / 266 5 CIRCUIT DIAGRAMS 5 CIRCUIT DIAGRAMS RESET PSD1 PSD3 PSD5 PSD7 EIN11 EIN10 EIN9 EIN8 EIN7 EIN6 EIN5 EIN4 EIN3 EIN2 EIN1 ANALOG-4 ANALOG-3 ANALOG-2 ANALOG-1 GND A12 A13 A21 A22 A23 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 24V-TR PSD0 PSD2 PSD4 PSD6 EIN23 EIN22 EIN21 EIN20 SICHER EIN19 EIN18 EIN17 EIN16 EIN15 EIN14 EIN13 A32 A31 A30 A29 A28 A27 A26 A25 A24 A20 A19 A18 A17 A16 A15 A14 A11 C11 A11 EIN12 A9 Vcc +5V 24V-TR RESET CS1 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 U-PHASE UP-HF-A UP-HF IP-PAT-A IP-PAT RES-ANA1 RES-ANA2 I-HFL TSI-STE U-PRIM CS5 CS4 CS3 CS2 RESET ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vcc +5V A17 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 Name A16 B14 A14 nderung A15 B13 A13 Nr. A14 B12 Datum U-NESSY U-SYM U-FUNKE U-NETZT U-INT U-INP AUS AN B A TSI TEMP STE-EIN HF-EIN NT-EIN SICHER ANALOG-4 ANALOG-3 ANALOG-2 B11 A9 A8 Name A9 A8 A9 A8 A23 A23 A23 A24 A25 A27 A30 A31 A32 A29 A30 A31 A32 A29 A30 A31 A32 A Datum 20-07-94 M.Hagg Blatt 1 von 5 LP bs.: 30128-394 LP un.: 40128-092 Gepr ft Gezeich. 20-07-94 M.Fritz Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig U-NETZT GND Vcc +5V 30128-394 Zeichnungsnummer/DWG.NO Motherboard TSI-STE F-ST CS7 RESET CS6 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V +24V Benennung/Title ICC300 Gert/UNIT A29 A28 A26 U-INT U-INP A28 AUS A28 A26 A27 U-PRIM A25 TSI A24 A27 AN B TEMP A26 A25 A A22 A22 A22 A24 A21 A21 A19 A21 REL-NT A20 A18 A17 A16 A15 A14 A13 A12 A11 A10 A20 NTE ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A19 Vcc +5V A20 A17 A16 A15 A14 A13 A12 A11 A10 A19 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A18 Vcc +5V A7 A6 A5 A4 A18 A13 A12 A11 A10 A12 ANALOG-1 A11 Vcc +5V B9 A10 B8 B10 A9 A8 A7 A6 A5 A4 Vee Vdd -15V +15V A8 A10 SET C9 A10 A7 A6 A5 Vee Vdd -15V +15V C8 C10 A9 B7 Vee Vdd -15V +15V A8 B6 A7 B5 A6 A5 A7 Vee Vdd +15V -15V A6 Vee Vdd -15V +15V A5 CS C7 A4 A3 C6 +24V C5 +24V A7 +24V A6 B4 A4 A5 +24V A2 +24V A4 C4 GND A4 A3 A1 GND A2 A3 A2 B3 A3 GND B2 A2 GND A3 C3 A3 GND A2 C2 A2 J6 A1 A1 J5 ST-Endstufe B1 J4 Leistungsteil A1 J3 QK-Endstufe A1 J2 Control-Board C1 Vcc +5V Kleinspannung+Ton A1 J1 CPU Art. No. 80116-201 09 / 2004 ICC 300 Motherboard 30128-394 213 / 266 NE Nessy AE2 Gen. AE1 Gen. J26 J29 J28 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 5 Vcc +5V FING-B2 FING-A2 FING-B1 FING-A1 CS11 CS10 RESET CS9 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 D26 BA159 BA159 D25 D24 2 3 J27 J58 C24 10k R2 10k R1 GND NE Bu. AE2 Bu. Nr. 23 22 21 3 2 1 nderung 0 1 2 3 C20 4 5 20D 0 6 0 7 G 15 8 3 9 10 EN 11 12 13 14 15 4514 DMUX IC4 15 16 13 14 19 20 17 18 4 5 6 7 8 10 9 11 Datum 1 5 7 4 9 3 8 Name 6 6 8*10k Datum C4 7 5 13 12 11 10 4 5 6 7 13 12 11 10 3 4 5 6 7 Name CS14 CS13 GND 1 C3 20-07-94 M.Hagg Blatt 2 von 5 40128-092 LP bs.: 30128-394 LP un.: Gepr ft Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 9 14 2 8 16 ULN2004A 15 1 IC11 GND 9 14 3 8 16 2 IC10 ULN2004A 15 1 GND 68nF GND 68nF Gezeich. 20-07-94 M.Fritz A 8 4 Vcc +5V 9 3 68nF AE1 Bu. Vcc +5V SET PSD3 PSD2 PSD1 PSD0 CS Vcc +5V RESET J57 1 3 2 1 3 2 1 3 BA159 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 GND Vee Vdd -15V +15V +24V BA159 D27 IP-PAT IP-PAT-A UP-HF UP-HF-A U-PHASE U-NESSY U-SYM U-FUNKE RESET CS8 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A9 A8 A7 A6 A5 A4 A3 8*10k 2 A2 RN15 RN16 A1 2 1 3 2 1 3 2 1 Vcc +5V Vee Vdd -15V +15V +24V GND 2 RN9 A3 J8 2 2 Vdd +15V 3 3 Vcc +5V 4 4 Vcc +5V 5 5 1 1 Vcc +5V Vdd +15V Vdd +15V 6 6 A2 UE1 7 CS13 CS12 CS11 CS10 CS9 CS8 CS7 CS6 CS5 CS4 CS3 CS2 CS1 RESET J10 Res. J10 Res. Ton J2 30128-394 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC300 Gert/UNIT 7 A1 4 1 8 J7 5 2 8*10k $wert Refi-Board 6 3 9 8 214 / 266 9 Senso-Board ICC 300 Motherboard 30128-394 CIRCUIT DIAGRAMS RN8 J12 1 C32 6 u022 GND 1 1 R5 100R J19 J21 J17 J22 J18 1 F1 T200mA 1 1 1 J20 24V TR1 J16 Sek. 1 - ~ ~ 5 - J15 1 BH37933 + BR1 C6 Nr. B250C5000 + BR2 C7 2 D1 nderung GND 3k6 D2 2 3 6 Datum J14 Name Leistungsteil rot 24V-TR 1N4148 R3 u68 REL1 + + RLV 680uF R6 680uF R9 +24V Datum Name GND 68nF 20-07-94 M.Hagg Blatt LP un.: 3 von 5 40128-092 LP bs.: 30128-394 Gepr ft Gezeich. 20-07-94 M.Fritz A Vee -15V C11 REL1 68nF C9 MASSE Vdd +15V GND GND Vcc +5V C23 C22 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND Vdd +15V 68nF 1 Gehuse J11 u022 C33 0.5 +24V GND C10 C8 3 2 1 J13 Vcc +5V GND 0.5 0.5 30128-394 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC300 Gert/UNIT 1 J10 Frontplatte GND 68nF REL1 Prim.1 Prim.2 ~ ~ 22k 22k C5 C15 CIRCUIT DIAGRAMS 1000uF 68nF 5 68nF Art. No. 80116-201 09 / 2004 ICC 300 Motherboard 30128-394 215 / 266 + SICHER CS14 CS13 RESET Vcc +5V GND 3 2 Vcc +5V GND 7 10 12 15 6 11 13 14 40174 5 1D R C1 4 3 9 1 1N4148 2 15 14 IC3 12 13 D4 10 11 40174 7 6 2 5 1D R C1 IC2 2k2 4 3 9 1 1N4148 D3 RN6 RN7 rot Vdd +15V Nr. 2 2 R10 8 8 D8 7 7 PSD7 6 6 PSD6 1 1 PSD5 Vcc +5V Vcc +5V 5 5 PSD4 8*10k nderung 8*10k PSD3 3 3 PSD2 9 9 PSD1 C1 4 4 13 12 11 10 4 5 6 7 13 12 11 10 3 4 5 6 7 12 11 10 4 5 6 7 Datum GND Name 13 3 9 14 2 8 16 ULN2004A 15 1 IC9 GND 9 14 2 8 16 ULN2004A 15 1 IC8 GND 9 14 3 8 16 2 IC7 ULN2004A 15 1 3 4 3 2 3 2 Vdd +15V Vdd +15V 20-07-94 M.Hagg 30128-394 4 von 5 LP bs.: Blatt LP un.: 40128-092 Gepr ft Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 8 2 8 Vdd +15V Name 4 5 4 Datum 5 6 5 Gezeich. 20-07-94 M.Fritz A RN12 RN13 RN14 6 7 6 1 1 1 7 8 7 8*10k 8*10k 8*10k PSD0 68nF 5 68nF 9 9 9 216 / 266 30128-394 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC300 Gert/UNIT SICHER STE-EIN RLV R-BF/CF REL-NT RES-F5 RES-F4 RES-F3 NTE RES-F2 RES-F1 NT-EIN HF-EIN ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 ext. Steuerbus Signalleitungen GND ICC 300 Motherboard 30128-394 CIRCUIT DIAGRAMS 9 8 8*4k7 7 6 5 4 1 C2 RN5 PIO-Ausgnge 0R GND BF/CF J25 J24 F-ST RES-B3 RES-B2 RES-B1 BF/CF 3 2 1 3 2 1 680R 680R R19 R13 680R 680R R16 R11 680R R18 Vdd +15V 680R R17 Vdd +15V RN2 FuÆschalter 2 9 680R R15 680R GND GND GND 1 680R R14 Vdd +15V 8 C17 C19 C20 7 68nF C16 68nF C18 5 GND 68nF 7 FING-A3 FING-B3 GND 68nF GND 68nF 4 68nF C21 6 3 8*10k 3 9 3 9 7 11 5 2 4050 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 IC1 4 14 2 10 6 12 4 15 9 7 5 11 14 3 4050 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 IC13 RN1 2 3 RN18 2 10 6 4 12 15 2 2 1 Vdd +15V 4 R12 5 1 5 3 Vcc +5V 9 J23 5 Vdd +15V 6 8*10k RN17 7 FuÆschalter 1 2 8*10k Nr. RES-B5 RES-B6 FUFI-B3 FUFI-A3 Datum FUSS-B2 FUSS-A2 EIN12 EIN11 EIN10 EIN9 EIN8 EIN7 EIN22 nderung FUSS-A2 FUSS-B2 Name 6 6 1 1 4 4 3 3 2 2 Name 5 5 RN10 RN11 Datum 7 7 20-07-94 M.Hagg Blatt 5 von 5 LP bs.: 30128-394 LP un.: 40128-092 Gepr ft 8 8 8*10k 8*10k 9 7 1 4050 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 IC6 4050 1 4050 IC5 1 4050 IC5 11 5 3 1 4050 IC5 14 9 7 1 4050 IC5 11 5 3 4050 IC5 1 IC5 14 10 6 12 4 2 15 10 6 12 4 2 15 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 9 9 GND Gezeich. 20-07-94 M.Fritz A FUFI-A3 FUFI-B3 FING-B2 FING-A2 FING-B1 FING-A1 FUSS-B1 FUSS-A1 EIN21 FUSS-A1 FUSS-B1 7 Vcc +5V 5 5 1 1 4 4 3 3 2 2 30128-394 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC300 Gert/UNIT 8 Vcc +5V 8*10k 8*10k RN3 RN4 GND 6 6 CIRCUIT DIAGRAMS 7 GND 9 8 8 1 6 7 5 9 Art. No. 80116-201 09 / 2004 EIN16 EIN15 EIN14 EIN13 EIN6 EIN5 EIN23 EIN18 EIN17 EIN4 EIN3 EIN2 EIN1 EIN20 EIN19 ICC 300 Motherboard 30128-394 217 / 266 9 8 4 8*2k2 8 6 1 3 R20 ICC 300 Motherboard (bare) 40128-092 218 / 266 5 CIRCUIT DIAGRAMS J1 13 4 3 14 D2 D3 D4 D5 D1 D2 D3 D4 D5 D6 D7 A11 A12 A13 A14 A15 A16 A17 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 D0 A10 A9 0.6 Vdd +15V 0.6 GND 0.8 FING_B2 FING_A2 FING_B1 FING_A1 Vee -15V +24V STEUERBUS Vcc +5V A8 A7 Vdd +15V 15 2 5 12 7 10 GND STEUERBUS 40174 +24V 1D R C1 A6 A5 A4 A3 A2 A1 6 D1 MP1 11 D0 9 R14 2 3 4 5 6 7 8 9 D0 D1 D2 D3 D4 D5 D6 D7 10k R15 10k STEUERBUS Vdd +15V GND REL1 RN1 3 Vdd +15V GND D15 1 GND Vdd +15V 3 1 2 9 12 8 6 4 5 GND 1N4148 2 REL2 RCX CX C14 GND G 2 1 3 4 5 Q 4528 RX/ CX R CX IC5 13 11 10 & 1N4148 Q OSC OUT GND T4 BC547 +24V 7 6 5k1 R22 14 15 13 12 11 Vdd +15V 2 2 & GND 1 3u3 9 10 Nr. nderung GND 1 3 1 2 6 5 4011 & IC4 4011 & IC4 GND Datum Name 3 4 10:10:32 2 T6 BC517 3 UE2 1 Vdd +15V GND 1 3 10:10:32 T2 BC517 3 2 B D1 4011 & IC4 4011 & Datum 12 13 9 8 Vdd +15V IC4 11 10 T2 T1 GND D14 11V D5 11V Name E 14-07-94 M.Hagg Blatt 1 von 1 LP bs.: 30128-352 LP un.: 40128-093 Gepr ft SFH450 IC2 SFH450 IC1 D4 GND 10 9 11 8 4 5 3 6 1N4148 4013 S C D R IC3 4013 S C D R IC3 R23 R6 150R 12 13 2 1 GND Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig Vdd +15V Gezeich. 10-02-94 M.Fritz Vdd +15V C4 C5 1N4148 1N4148 R2 10nF R1 56R R5 56R GND 10 9 11 8 4 5 3 6 4013 S C D R IC7 4013 S C D R IC7 12 13 2 1 30128-352 3 2 1 3 2 1 Zeichnungsnummer/DWG.NO RELAIS-BOARD Benennung/Title ICC Gert/UNIT 10nF 150R 0R D6 0R D9 UE1 1 14-7-94 Fritz R21 1k 2 C8 3u3 + 2 + B 3251 s.Anderungsmit. 4528 RX/ CX R CX IC5 GND T5 BC517 3 GND 1 T1 BC517 3 GND C9 SD101A REL2 4047 AST AST -TRIG +TRIG RTRIG MR RX IC6 Vdd +15V T3 BC547 GND Vdd +15V 8x10k 2 +24V REL2 R25 1 1 4k7 3 1 n.best. D16 SD101A 4k7 D17 R13 D19 R16 IC8 J2 R19 68nF T1 T1 D18 R17 D20 R18 4k7 SD101A 4k7 n.best n.best Vdd +15V 100pF T2 T2 1nF 1nF R8 R7 R10 R9 REL1 6n8 5k1 680R 510R 680R 510R C D2 D10 D11 B 2 + R20 1N4148 1N4148 IC1 SFH350 D7 D8 3 R24 3u3 C10 C D3 D12 D13 B C3 C2 E 1N4148 1N4148 1N4148 IC2 SFH350 C1 C6 R3 R4 10nF 10nF 5k1 n.best n.best REL1 C11 SD101A 4k7 +15V Vdd 1 10k C13 68nF C12 FING_A1 FING_B1 CIRCUIT DIAGRAMS 68nF J4 J3 FING_A2 5 FING_B2 Art. No. 80116-201 09 / 2004 ICC 300 Relay Board 30128-352 219 / 266 C7 ICC 300 Relay Board (bare) 40128-093 220 / 266 5 CIRCUIT DIAGRAMS PCBs only for ICC 350 222 / 266 5 CIRCUIT DIAGRAMS 5 CIRCUIT DIAGRAMS RESET PSD1 PSD3 PSD5 PSD7 EIN11 EIN10 EIN9 EIN8 EIN7 EIN6 EIN5 EIN4 EIN3 EIN2 EIN1 ANALOG-4 ANALOG-3 ANALOG-2 ANALOG-1 GND A12 A13 A21 A22 A23 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 24V-TR PSD0 PSD2 PSD4 PSD6 EIN23 EIN22 EIN21 EIN20 SICHER EIN19 EIN18 EIN17 EIN16 EIN15 EIN14 EIN13 A32 A31 A30 A29 A28 A27 A26 A25 A24 A20 A19 A18 A17 A16 A15 A14 A11 C11 A11 EIN12 A9 Vcc +5V 24V-TR RESET CS1 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 U-PHASE UP-HF-A UP-HF IP-PAT-A IP-PAT RES-ANA1 RES-ANA2 I-HFL TSI-STE U-PRIM CS5 CS4 CS3 CS2 RESET ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vcc +5V Name A16 A17 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 nderung A15 B13 A13 Nr. A14 B12 Datum U-NESSY U-SYM U-FUNKE U-NETZT U-INT U-INP AUS AN B A TSI TEMP STE-EIN HF-EIN NT-EIN SICHER ANALOG-4 ANALOG-3 ANALOG-2 B11 A12 ANALOG-1 A9 A8 Name A9 A23 A23 A23 A24 A25 A27 A30 A31 A32 A29 A30 A31 A32 A29 A30 A31 A32 A Datum 20-07-94 M.Hagg Blatt LP un.: 1 von 6 40128-092 LP bs.: 30128-351 Gepr ft Gezeich. 27.01.94 M.Fritz Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig U-NETZT U-INT GND Vcc +5V 30128-351 Zeichnungsnummer/DWG.NO Motherboard TSI-STE F-ST CS7 RESET CS6 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V +24V Benennung/Title ICC Gert/UNIT A29 A28 A26 U-INP A28 AUS A28 A26 A27 U-PRIM A25 TSI A24 A27 AN B TEMP A26 A25 A A22 A22 A22 A24 A21 A21 A21 A19 A20 REL-NT A20 A18 A17 A16 A15 A14 A13 A12 A11 A19 NTE ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A8 A10 A20 A17 A16 A15 A14 A13 A12 A11 Vcc +5V A19 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A9 A8 A10 A18 Vcc +5V A7 A6 A5 A4 A18 A13 A12 A11 A10 A11 Vcc +5V B9 A10 B8 B10 A9 A8 A7 A6 A5 A4 Vee Vdd -15V +15V A8 A10 SET C9 A10 A7 A6 A5 Vee Vdd -15V +15V C8 C10 A9 B7 Vee Vdd -15V +15V A8 B6 A7 B5 A6 A5 A7 Vee Vdd +15V -15V A6 Vee Vdd -15V +15V A5 C7 CS C6 A4 A3 C5 +24V A7 +24V A6 +24V A5 +24V B4 A4 A2 +24V GND A4 A3 C4 GND A4 A3 A1 GND B3 A3 A3 C3 A3 GND A2 A2 B2 A2 J6 A1 A1 B1 A1 A2 J5 ST-Endstufe A1 GND J4 Leistungsteil C2 J3 QK-Endstufe C1 J2 Control-Board A2 Vcc +5V Kleinspannung+Ton A1 J1 CPU Art. No. 80116-201 09 / 2004 ICC 350 Motherboard 30128-351 223 / 266 Vcc +5V 5 2 A19 A18 A17 A16 A15 A14 A13 A12 A11 CS13 CS12 CS11 RESET ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 RES-ANA2 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 4 5 nicht bestueckt +24V 3 J9 RES-F6 RES-F4 RES-F3 RES-F2 RES-F1 RES-B6 RES-B5 RES-B4 RES-B3 RES-B2 RES-B1 FING-B3 FING-A3 -15V +24V Vee GND A32 A32 1 A31 A31 -15V Vee A30 A30 A28 A27 A26 A25 A24 A23 A22 A29 IP-PAT IP-PAT-A UP-HF UP-HF-A U-PHASE U-NESSY U-SYM A29 A28 A27 A26 A25 A24 A23 A22 U-FUNKE A21 GND A9 A8 A10 A20 RESET CS8 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 A7 A6 A21 RES-ANA1 Vdd +15V Vcc +5V Vee Vdd -15V +15V A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A5 A3 GND Vcc +5V FING-B2 FING-A2 FING-B1 FING-A1 CS11 CS10 RESET CS9 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vdd +15V Vcc +5V Vee Vdd -15V +15V +24V Vcc +5V SET PSD3 PSD2 PSD1 PSD0 CS Vcc +5V RESET C24 10k R2 10k R1 Nr. 23 22 21 3 2 1 nderung 0 1 2 3 C20 4 5 20D 0 6 0 7 G 15 8 3 9 10 EN 11 12 13 14 15 4514 DMUX IC4 15 16 13 14 19 20 17 18 4 5 6 7 8 10 9 11 Datum 1 5 7 4 9 3 8 Name 6 6 8*10k Datum C4 7 5 2 RN9 13 12 11 10 4 5 6 7 13 12 11 10 3 4 5 6 7 Name CS14 CS13 GND 1 C3 Blatt LP 20-07-94 M.Hagg 2 von 6 40128-092 bs.: 30128-351 LP un.: Gepr ft Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 9 14 2 8 16 ULN2004A 15 1 IC11 GND 9 14 3 8 16 2 IC10 ULN2004A 15 1 GND 68nF GND 68nF Gezeich. 27.01.94 M.Fritz A 8 4 Vcc +5V 9 3 68nF GND 8*10k 2 A2 +24V A4 RN15 RN16 A1 GND A3 2 2 A2 J8 3 3 A1 4 4 J7 5 5 Vdd +15V Vdd +15V Vdd +15V 6 6 Vcc +5V 7 CS13 CS12 CS11 CS10 CS9 CS8 CS7 CS6 CS5 CS4 CS3 CS2 CS1 30128-351 Zeichnungsnummer/DWG.NO Motherboard J10 Res. J10 Res. Ton J2 RESET Benennung/Title ICC Gert/UNIT 7 Vcc +5V 8 1 1 Vcc +5V 8*10k $wert Refi-Board 9 8 224 / 266 9 Senso-Board ICC 350 Motherboard 30128-351 CIRCUIT DIAGRAMS RN8 J12 1 C32 6 u022 GND 1 1 R5 100R J19 J21 J17 J22 J18 1 F1 T200mA 1 1 1 J20 24V TR1 J16 Sek. 1 - ~ ~ 5 - J15 1 BH37933 + BR1 C6 Nr. B250C5000 + BR2 C7 2 D1 nderung GND 3k6 D2 2 3 6 Datum J14 Name Leistungsteil rot 24V-TR 1N4148 R3 u68 REL1 + + RLV 680uF R6 680uF R9 +24V Datum Name GND 68nF 20-07-94 M.Hagg Blatt LP un.: 3 von 6 40128-092 LP bs.: 30128-351 Gepr ft Gezeich. 27.01.94 M.Fritz A Vee -15V C11 REL1 68nF C9 MASSE Vdd +15V GND GND Vcc +5V C23 C22 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND Vdd +15V 68nF 1 Gehuse J11 u022 C33 0.5 +24V GND C10 C8 3 2 1 J13 Vcc +5V GND 0.5 0.5 30128-351 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC Gert/UNIT 1 J10 Frontplatte GND 68nF REL1 Prim.1 Prim.2 ~ ~ 22k 22k C5 C15 CIRCUIT DIAGRAMS 1000uF 68nF 5 68nF Art. No. 80116-201 09 / 2004 ICC 350 Motherboard 30128-351 225 / 266 + SICHER CS14 CS13 RESET Vcc +5V GND 3 2 Vcc +5V GND 12 13 40174 10 11 15 7 6 14 5 1D R C1 4 3 9 1 1N4148 2 15 14 IC3 12 13 D4 10 11 40174 7 6 2 5 1D R C1 IC2 2k2 4 3 9 1 1N4148 D3 RN6 RN7 rot Vdd +15V Nr. 2 2 R10 8 8 D8 7 7 PSD7 6 6 PSD6 1 1 PSD5 Vcc +5V Vcc +5V 5 5 PSD4 nderung 3 3 PSD3 8*10k 8*10k PSD2 9 9 PSD1 C1 4 4 13 12 11 10 4 5 6 7 13 12 11 10 3 4 5 6 7 13 12 3 4 5 Datum Name 10 7 GND 11 6 9 14 2 8 16 ULN2004A 15 1 IC9 GND 9 14 2 8 16 ULN2004A 15 1 IC8 GND 9 14 3 8 16 2 IC7 ULN2004A 15 1 3 4 3 2 3 2 Vdd +15V Vdd +15V 20-07-94 M.Hagg Blatt 4 von 6 LP bs.: 30128-351 LP un.: 40128-092 Gepr ft Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 8 2 8 Vdd +15V Name 4 5 4 Datum 5 6 5 Gezeich. 27.01.94 M.Fritz A RN12 RN13 RN14 6 7 6 1 1 1 7 8 7 8*10k 8*10k 8*10k PSD0 68nF 5 68nF 9 9 9 226 / 266 30128-351 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC Gert/UNIT SICHER STE-EIN RLV R-BF/CF REL-NT RES-F5 RES-F4 RES-F3 NTE RES-F2 RES-F1 NT-EIN HF-EIN ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 ext. Steuerbus Signalleitungen GND ICC 350 Motherboard 30128-351 CIRCUIT DIAGRAMS 9 8 8*4k7 7 6 5 4 1 C2 RN5 PIO-Ausgnge J25 J24 F-ST RES-B3 RES-B2 RES-B1 BF/CF 3 2 1 3 2 1 680R 680R R19 R13 680R 680R R16 R11 680R R18 Vdd +15V 680R R17 Vdd +15V RN2 FuÆschalter 2 9 680R 680R R15 GND GND GND 1 3 Vdd +15V 8 C17 C19 C20 7 68nF C16 68nF C18 5 GND 68nF 7 FING-A3 FING-B3 GND 68nF GND 68nF 4 68nF C21 6 3 8*10k 2 9 3 9 7 1 4050 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 1 4050 IC1 11 5 2 IC1 4 14 2 10 6 12 4 15 9 7 5 11 14 3 4050 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 4050 IC13 1 IC13 RN1 RN18 2 10 6 4 12 15 2 2 1 Vdd +15V 3 R12 4 680R R14 5 1 5 3 Vcc +5V 9 J23 5 Vdd +15V 6 8*10k RN17 7 FuÆschalter 1 2 8*10k Nr. RES-B5 RES-B6 FUFI-B3 FUFI-A3 Datum FUSS-B2 FUSS-A2 EIN12 EIN11 EIN10 EIN9 EIN8 EIN7 EIN22 nderung FUSS-A2 FUSS-B2 Name 6 6 1 1 4 4 3 3 2 2 Name 5 5 RN10 RN11 Datum 7 7 20-07-94 M.Hagg Blatt 5 von 6 LP bs.: 30128-351 LP un.: 40128-092 Gepr ft 8 8 8*10k 8*10k 9 7 11 5 3 14 9 7 11 5 3 14 4050 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 4050 IC6 1 IC6 4050 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 4050 IC5 1 IC5 10 6 12 4 2 15 10 6 12 4 2 15 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 9 9 GND Gezeich. 27.01.94 M.Fritz A FUFI-A3 FUFI-B3 FING-B2 FING-A2 FING-B1 FING-A1 FUSS-B1 FUSS-A1 EIN21 FUSS-A1 FUSS-B1 7 Vcc +5V 5 5 1 1 4 4 3 3 2 2 30128-351 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC Gert/UNIT 8 Vcc +5V 8*10k 8*10k RN3 RN4 GND 6 6 CIRCUIT DIAGRAMS 7 GND 9 8 8 1 6 7 5 9 Art. No. 80116-201 09 / 2004 EIN16 EIN15 EIN14 EIN13 EIN6 EIN5 EIN23 EIN18 EIN17 EIN4 EIN3 EIN2 EIN1 EIN20 EIN19 ICC 350 Motherboard 30128-351 228 / 266 9 8 4 8*2k2 8 6 1 3 GND 5 GND Vee -15V 4 IC12 TL082 8 + Vdd +15V R7 10k D5 C12 C14 D6 D7 1N4148 1k/1W 68nF 68nF 100k GND IC12 TL082 - 5 + 6 IC12 TL082 - 3 + 2 7 1 NE Nessy J26 I-HFL 3 2 1 3 UE1 Nr. R25 GND nderung 4 1 2 5 2 1 6 3 1k2 D10 AE2 Gen. BA159 C31 Datum BA159 J29 u022 C30 Name C28 3 A C29 3 2 J27 J58 J57 1 3 2 1 3 2 Datum GND GND Name Vdd +15V NE Bu. AE2 Bu. AE1 Bu. 20-07-94 M.Hagg Blatt 6 von 6 LP bs.: 30128-351 LP un.: 40128-092 Gepr ft Gezeich. 27.01.94 M.Fritz 68R R24 BA159 BA159 D27 D26 BA159 BA159 D25 u022 u15 1 R22 u15 TP1 D24 C26 C27 GND 68nF Vee -15V 3M3 R21 IC14 OFF LF356 -+ 3 + - 2 Vdd +15V 5 6 R-BF/CF Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig GND 68nF 2 1 1 10k 220R REL2 REL2 D11 7 4 J28 2k2 1N4148 D9 1N4148 D22 rot D23 GND +24V 30128-351 Zeichnungsnummer/DWG.NO Motherboard Benennung/Title ICC Gert/UNIT R23 3k6 R74 1N4148 D12 REL2 R20 / 266 330k C25 228 1uF AE1 Gen. BF/CF RES-F5 ICC 350 Motherboard 30128-351 CIRCUIT DIAGRAMS 10nF R8 10V 10V C13 L1 R4 ICC 350 Art. No. 80116-201 09 / 2004 Motherboard (bare) 40128-092 5 CIRCUIT DIAGRAMS 229 / 266 J1 13 4 3 14 D2 D3 D4 D5 0.6 Vcc +5V D1 D2 D3 D4 D5 D6 D7 A11 A12 A13 A14 A15 A16 A17 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 D0 A10 A9 Vdd +15V 0.6 GND 0.8 FING_B2 FING_A2 FING_B1 FING_A1 +24V STEUERBUS Vdd +15V A8 A7 GND 15 2 5 12 7 10 Vee -15V STEUERBUS 40174 +24V 1D R C1 A6 A5 A4 A3 A2 A1 6 D1 MP1 11 D0 9 R14 4 5 6 7 D2 D3 D4 D5 9 Vdd +15V D7 8 3 D1 D6 2 D0 10k R15 10k GND REL1 RN1 3 Vdd +15V GND D15 1 GND Vdd +15V 3 1 2 9 12 8 6 4 5 GND 1N4148 2 REL2 RCX CX GND G 2 1 3 4 5 Q 4528 RX/ CX R CX IC5 13 11 10 & 1N4148 Q OSC OUT GND T4 BC547 +24V D16 REL2 4047 AST AST -TRIG +TRIG RTRIG MR RX IC6 Vdd +15V T3 BC547 GND Vdd +15V 8x10k 2 4k7 +24V R25 1 STEUERBUS REL2 n.best. IC8 1 R19 68nF 3 1 7 6 5k1 R22 14 15 13 12 11 Vdd +15V 2 SD101A 2 4k7 D17 R13 D19 R16 & C14 GND 1 9 10 + Nr. nderung GND 1 3 1 2 6 5 4011 & 4011 IC4 & IC4 GND Datum Name 3 4 10:10:32 2 T6 BC517 3 UE2 1 Vdd +15V GND 1 3 B 4011 & 4011 IC4 & Datum 12 13 9 8 Vdd +15V IC4 1N4148 1N4148 11 10 E Name T2 T1 GND D14 11V D5 14-07-94 M.Hagg Blatt 1 von 1 LP bs.: 30128-352 LP un.: 40128-093 Gepr ft D4 6 GND 10 9 11 8 4 5 3 4013 S C D R IC3 4013 S C D R IC3 R23 R2 R6 150R 12 13 2 1 GND Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig Vdd +15V SFH450 IC2 SFH450 IC1 1N4148 1N4148 150R 10nF R1 56R R5 56R GND 10 9 11 8 4 5 3 6 4013 S C D R IC7 4013 S C D R IC7 12 13 2 1 30128-352 3 2 1 3 2 1 Zeichnungsnummer/DWG.NO RELAIS-BOARD Benennung/Title ICC Gert/UNIT 10nF 11V 5k1 Gezeich. 10-02-94 M.Fritz Vdd +15V C4 C5 10:10:32 2 T2 BC517 3 1 14-7-94 Fritz R21 1k 2 C8 3u3 + 2 C9 3u3 B 3251 s.Anderungsmit. 4528 RX/ CX R CX IC5 GND T5 BC517 3 GND 1 T1 BC517 3 GND R8 R7 R10 2 6n8 T1 T1 SD101A 680R 510R R9 D18 R17 D20 R18 4k7 SD101A 4k7 0R D6 0R D9 UE1 100pF T2 T2 1nF 1nF D1 D2 D10 D11 B 680R 510R C n.best n.best Vdd +15V R20 1N4148 1N4148 IC1 SFH350 D7 D8 REL1 C11 SD101A 4k7 +15V Vdd J2 + C C3 C2 E D3 D12 D13 B 1N4148 1N4148 IC2 SFH350 C1 C6 R3 R4 10nF 10nF 5k1 n.best n.best 3 R24 3u3 C10 FING_A1 FING_B1 1 10k C13 68nF C12 5 68nF J4 J3 FING_A2 230 / 266 FING_B2 REL1 ICC 350 Relay Board 30128-352 CIRCUIT DIAGRAMS C7 ICC 350 Art. No. 80116-201 09 / 2004 Relay Board (bare) 40128-093 5 CIRCUIT DIAGRAMS 231 / 266 5 J2-5 NULL J2-5 J2 5 4 3 2 1 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 D12 BA159 BA159 D11 J2-5 NULL J2-2 J2-1 Vcc +5V I-NEURO CS13 RESET CS12 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V 2 1 I I J2-2 G IC1 78xx 7815 IC2 79xx 7915 G O O 3 3 R1 MP3 MP2 MP5 820k C8 NEG15 POS15 NULL CLR NULL 10uF 220R 1k5 R21 10k R9 68nF R4 + B250C800 D2 4 IC3 TL082 8 + D7 9V1 9V1 D6 +24V - NEG15 POS15 2 NEG15 T5 BC557 Nr. 6 NULL 1k R19 - R2 7 nderung R36=3k3 TL082 IC6 5 + FTEST 1 10k A5 C9 C10 2 R23 T1 BUX84 1k5 Datum 14.6.93 NULL 10k 3 A4 + + 2 10k R13 Name MF 3 + 1 7 D1 1N4148 + CT - CT RT Blatt 1 von 2 Fout 2 2 1 TY1 10k R14 1 NULL U-STEUER I-FREQ 3 R15 F1 MP9 T4 BUX84 REL2 MP4 REL1 REL2 REL1 30128-070 Zeichnungsnummer/DWG.NO Neurotest-Board Benennung/Title ICC Gert/UNIT NULL 1 MP1 T2 BUX84 62mA Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig AD654 DGND U F 1k POS15 IC4 5 Vin Name 6 7 3 4 8 FRES M.Fritz 14-06-93 Datum R5 470R R38 2 8k2 30128-070 LP bs.: 40128-027 LP un.: Gepr ft Gezeich. C IC3 TL082 - 5 + 6 IC3 TL082 - R6 R8 A3 100uF C1 100uF C2 NEG15 27k 27k GND C14 A2 100nF 100nF R12 1N4148 C13 R3 T3 BUX84 3 1 BR1 0u33 1 X0303 A1 2 1 + C3 3 1 390R 0u047 2 3 ~ ~ C12 C11 10k J2-1 + + R24 TP1 220k D13 MP6 1uF 1uF 10k 10k 2 3 R22 BA159 R7 232 / 266 390R J1 J4 3 2 1 J5 NE AE 3 2 1 ICC 350 Neurotest Neurotest Board 30128-070 CIRCUIT DIAGRAMS R39 ESD5 ESD4 ESD3 ESD2 ESD1 14 3 4 13 6 11 9 IC14 8 + 4 IC6 TL082 40174 R C1 1D NULL 68nF C6 ESD0 68nF C4 1 68nF CS12 3 4 5 7 12 5 2 15 NEG15 POS15 2 7 IC13 GND 8 11 10 12 13 14 15 16 rot D14 D16 REL2 1N4148 D15 REL1 1N4148 9 ULN2004A +24V 6 1 10 1k5 RESET R37 I-NEURO R36 2k2 Vdd +15V R35 1k3 Vdd +15V R34 1k3 Vdd +15V R33 1k3 Vdd +15V R32 1k3 Vdd +15V R31 MP7 GND 3k3 C7 8 9 GND IC8 CNY66 CNY66 IC12 CNY66 IC11 CNY66 IC10 CNY66 IC9 Vdd +15V 1 16 1 16 1 16 1 16 1 16 CNY66 IC7 R29 1 16 8 9 8 9 8 9 8 9 8 9 1k3 POS15 I-FREQ R10 Vdd +15V POS15 3k3 R20 Nr. R30 CIRCUIT DIAGRAMS 68nF 3k3 R18 8k2 5 NULL 11 12 13 10 3k3 nderung R36=3k3 NULL 3k3 R16 Art. No. 80116-201 09 / 2004 + - 8 Datum 14.6.93 4028 BCD/DEC 0 1 2 1 3 2 4 4 5 8 6 7 8 9 IC5 16 Name MF NULL 5 9 4 7 6 1 15 2 14 3 POS15 Blatt LP bs.: LP un.: 2 von 2 30128-070 40128-027 M.Fritz 14-06-93 Gepr ft Datum Name 1N4148 1N4148 D4 C 2k4 4k3 R17 1N4148 D10 Gezeich. FTEST FRES CLR 7k5 R28 1N4148 D9 1N4148 D8 30k R26 13k R27 D5 R25 IC6 TL082 1 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig 3 + 2 D3 R11 220k U-STEUER NEG15 30128-070 Zeichnungsnummer/DWG.NO Neurotest-Board Benennung/Title ICC Gert/UNIT 1N4148 ICC 350 Neurotest Neurotest Board 30128-070 233 / 266 C5 ICC 350 Neurotest Neurotest Board 40128-027 234 / 266 5 CIRCUIT DIAGRAMS Vcc +5V CS13 CS12 CS11 RESET ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 -15V Vee Vcc +5V RES-ANA2 +24V GND F-IIST CS13 RESET CS12 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 Vee Vdd -15V +15V +24V RES-ANA1 Vdd +15V A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 4 6 2 3 5 1 J2 GND RES-F6 RES-F4 RES-F3 RES-F2 LED-FERN RES-B6 RES-B5 RES-B4 F-INTENS FING-NEU F-IIST FING-B3 FING-A3 -15V +24V Vee Vdd +15V GND 2u2 + Vcc +5V LED-FERN F-INTENS GND R2 1k Vdd +15V 2 C2 C6 A4 GND 1k 2V7 C5 Vdd +15V 1u5 2 GND 10:10 1 UE1 68nF C4 1 5 4 3 GND 2 J4 Nr. nderung IC1 Name SFH450 Datum 100R 68nF R1 C3 Zur Fernbedienungsbuchse 100R R7 T1 BC517 u15 A3 R3 D1 Vdd +15V 3 1 A2 GND B Datum GND 4 2 40128-028 LP bs.: 30128-071 Blatt 1 von 1 LP un.: Gepr ft Name 4050 1 4050 IC2 1 IC2 15.10.92 5 3 IC1 SFH350 Vdd +15V Gezeich. M.Fritz B 1m8 L1 C1 A1 C E u47 R5 CIRCUIT DIAGRAMS 22k 5 J3 Vdd +15V 3 2 1 R4 1k rot D3 GND FING-NEU Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig D2 1N4148 10k R6 J1 Art. No. 80116-201 09 / 2004 14 4050 1 4050 IC2 1 4050 IC2 1 4050 IC2 1 IC2 15 12 10 6 30128-071 Zeichnungsnummer/DWG.NO Neurotest-Motherboard ZMK Benennung/Title ICC Gert/UNIT GND 11 9 7 ICC 350 Neurotest Motherboard Neurotest 30128-071 235 / 266 ICC 350 Neurotest Motherboard Neurotest (bare) 40128-028 236 / 266 5 CIRCUIT DIAGRAMS RESET CS12 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 CS11 RESET ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 CS12 RESET A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 10 11 9 8 7 6 5 4 3 22k 1 15 14 CS11 Vdd +15V 2 3 RN1 12 2 5 13 40174 10 4 1D 11 6 9 7 7 6 R C1 12 13 1 5 40174 IC5 15 2 4 1D R C1 IC6 RES-ANA2 RES-ANA1 TRANS_1 CS11 RESET CS12 ESD7 ESD6 ESD5 ESD4 ESD3 ESD2 ESD1 ESD0 14 3 9 1 Vcc +5V 2 2 1 3 R31 J2 22k 9 Vdd +15V TRANS_1 A2 A1 OSZI_ON GND +24V 10 12 13 14 15 16 7 3 11 8 ULN2004A 2 6 5 4 3 2 IC4 3 1 1 REL1 REL1 J3 REL2 REL2 1 REL7 Vee Vdd -15V +15V J13 +24V 2k 2 Vdd +15V Vee -15V - IC3 TL084 + J9 J11 J10 J8 REL4 REL4 REL2 REL3 REL3 2 J6 REL1 68nF 1 1 D1 3 rot J5 R2 4 3 2k rot +24V D2 A5 R1 C8 A4 2k rot A3 8 + 4 IC1 TL082 R3 D3 REL5 REL5 REL3 68nF REL6 REL6 REL4 J12 2k rot P6KE18CA P6KE18CA 1 1 Nr. C 3107 A1 15:15 2 15:15 UE1 2 UE2 D 4015 REL5 GND R4 D4 D11 D10 2k rot C15 2 1uF C14 1uF R21 GND T3 BS170 nderung R17=2k4 D10,D11 neu 1 3 Vdd +15V 10k R22 Vdd +15V A2 Datum 30.4.94 10.12.96 T1 BS170 Name Fritz Fritz GND 1 2 22k Vdd +15V 3 GND 5k GND 2k4 R9 GND C5 GND R16 Datum -+ Name Blatt 1 von 1 2k4 GND 7 REL7 REL7 R29 2k R15 GND 6 GND 2k4 R30 100R R26 RES-ANA1 5k 4k7 R34 1N4148 D9 GND Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig +24V M.Fritz C10 68nF IC3 TL084 - 5 + 6 Vee -15V GND C7 68nF 7 IC2 B/C1 C2 LM318 B/C3 3 + - 2 Vdd +15V 40128-064 LP bs.: 30128-200 LP un.: Gepr ft R33 2k7 GND - 5k6 GND GND 22nF OSZI_ON 8 C1 R32 1nF GND 6 TL082 IC1 5 + R25 Gezeich. 28-05-93 D T2 BS170 R18 1 3 GND IC3 TL084 - OSZ_OUT 10 + 9 2 2k4 2k4 R11 U_KENN TP1 R7 C2 A2 R5 D5 15k 12k A1 REL6 J1 2k rot NE R6 D6 J4 R20 D7 C9 2k gelb R19 C6 10k 10k 22nF R12 C3 R23 220pF 10k 1 4k7 1nF R17 C4 C12 8 4k7 R10 2k4 1nF 1nF R28 4k7 R24 2k4 7 4 68nF AE C13 5 MASSE BA159 CIRCUIT DIAGRAMS 11 D8 TP2 R8 R27 5 5 4 3 2 1 2k4 - 30128-200 Zeichnungsnummer/DWG.NO MIC-Board OSZ_OUT GND 1.0 Vee -15V 0.7 0.7 MP2 U_KENN RES-ANA2 MP1 Vdd +15V 390R R13 1 1 Ventil 14 Benennung/Title ICC R35 2k7 TL084 IC3 R14 2 Gert/UNIT J7 - TL082 IC1 3 + 2 3 + IC3 TL084 - 22nF GND GND 4k7 12 + 13 GND GND 20k C11 Art. No. 80116-201 09 / 2004 ICC 350 MIC-MIEN-DOKU MIC Board 30128-200 237 / 266 ICC 350 MIC-MIEN-DOKU MIC Board (bare) 40128-064 238 / 266 5 CIRCUIT DIAGRAMS Art. No. 80116-201 09 / 2004 Nr. CIRCUIT DIAGRAMS nderung J10 1 2 Datum 250mA F10 Name 01-12-97 01-12-97 Gepr ft Name E.Werner E.Werner Blatt 1 von 1 LP un.: 40128-141 LP bs.: 30128-661 Datum Gezeich. NS2004 NS2004 A 1N5373 D101 D105 Bruecke D104 Bruecke C100 D106 NS2004 D107 3 2 1 J11 Diese Zeichnung ist urheberrechtlich gesch tzt, daher Weitergabe und Vervielfltigung ohne unsere Genehmigung unzulssig D103 NS2004 D109 0.01uF D108 1N5383 D102 5 1N5383 3 30128-661 Zeichnungsnummer/DWG.NO Protection-Board Benennung/Title ICC 350 MMH Doku Gert/UNIT ICC 350 MIC-MIEN-DOKU Protection Board 30128-661 239 / 266 ICC 350 MIC-MIEN-DOKU Protection Board (bare) 40128-141 240 / 266 5 CIRCUIT DIAGRAMS Appendix A Part Numbers ICC 200 (D) 10128-002/-010/-023 50502-059 30128-060 30121-025 40128-103 30121-023 30128-065 30121-195 30128-056 51501-167 Art.-No. 80116-201 09 / 2004 51501-167 30121-086 30128-063 A APPENDIX A 51601-056 50610-009 51611-051 (Fuses) 51031-043 (Pot.) 51501-190 (button) -191 -192 51603-000 (cpl.) 243 / 266 ICC 200 (UL) 10128-202/-204/-205 30128-458 50502-069 30128-725 30128-727 30128-728 (cpl.) 30128-065 30128-056 51501-167 30128-691 (pin) 51501-167 40128-103 30121-086 30128-063 244 / 266 51601-056 50610-009 51611-100 (Fuses) 51031-043 51501-190 51501-191 51501-192 51603-000 (cpl.) A APPENDIX A ICC 200 (INT) 10128-009/-015/-036 30128-458 30128-725 50502-059 30128-691 (pin) 51501-167 30128-727 30128-065 30128-728 30128-056 51501-167 Art.-No. 80116-201 09 / 2004 40128-103 30121-086 30128-063 A APPENDIX A 51601-056 50610-009 51611-051 (Fuses) 51031-043 (Pot.) 51501-190 (Button, cpl.) -191 -192 51603-000 245 / 266 ICC 200 (F) 10128-051/-054/-056 30128-116 50502-059 51501-167 30121-025 40128-112 30121-023 30128-065 30128-056 51601-056 30128-063 246 / 266 30121-086 50610-009 30121-195 51501-167 51611-051 51031-043 51501-190 51501-191 51501-192 51603-000 A APPENDIX A ICC 200 Boards 40128-103 40128-112 (F) Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Art.-No. 80116-201 09 / 2004 Ers. durch = Repl. by A APPENDIX A 247 / 266 ICC 300 (D) 10128-070, -071 51501-167 40128-133 30128-313 50502-059 30121-086 30121-025 30128-022 30127-011 248 / 266 30121-390 30128-021 30121-023 30121-023 51501-167 30121-195 51031-043 (Pot.) 51603-000 51501-190 51601-025 51611-051 -191 (Fuse) -192 50610-009 A APPENDIX A ICC 300 (UL) 10128-213, -214 51501-167 30128-419 30128-691 (Pin) 40128-133 30128-021 30121-390 30128-726 51501-167 30128-728 Art.-No. 80116-201 09 / 2004 50502-069 30128-725 30121-086 30128-022 30127-011 A APPENDIX A 50610-009 51031-043 51501-190 51601-025 -191 -192 51611-100 (Fuses) 51603-000 249 / 266 ICC 300 (INT) 10128-077, -078 51501-167 30128-419 50502-059 30121-086 30128-725 30128-691 30128-022 30127-011 250 / 266 40128-133 30121-390 30128-021 30128-726 51501-167 30128-728 50610-009 51603-000 51031-043 51501-190 51601-025 51611-051 -191 (Fuse) -192 A APPENDIX A ICC 300 (F) 10128-072, -073 51501-167 30128-315 30121-025 30128-021 30121-023 30121-390 30121-023 51501-167 30121-195 0Art.-No. 80116-201 09 / 2004 50502-059 40128-134 30121-086 30128-022 30127-011 A APPENDIX A 50610-009 51031-043 51501-190 51601-025 -191 -192 51603-000 51611-051 251 / 266 ICC 300 Boards 40128-133 (D/INT) 40128-134 (F) Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Ers. durch = Repl. by 252 / 266 A APPENDIX A ICC 350 (D) 10128-016 (Endo) 50502-059 30121-025 30121-023 30128-021 30121-023 40128-101 30121-195 30121-390 Art.-No. 80116-201 09 / 2004 30128-016 51501-167 30121-086 A APPENDIX A 30127-011 30128-022 50610-009 51601-025 51031-043 51501-190 51501-191 51501-192 51611-051 51501-167 51603-000 253 / 266 ICC 350 (UL) 10128-200, -206 (Endo) 30128-725 50502-069 30128-441 40128-101 30128-726 30128-021 30128-728 30121-390 30128-691 51501-167 30121-086 254 / 266 30127-011 30128-022 50610-009 51601-025 51031-043 51501-190 51501-191 51501-192 51611-100 (Fuses) A 51603-000 APPENDIX A ICC 350 (INT) 10128-061 (Endo) 30128-725 50502-059 30128-726 40128-101 30128-021 30128-441 30128-728 30121-390 Art.-No. 80116-201 09 / 2004 30128-691 51501-167 30121-086 A APPENDIX A 30127-011 30128-022 50610-009 51601-025 51031-043 51501-190 51501-191 51501-192 51611-051 51501-167 51603-000 255 / 266 ICC 350 (F) 10128-055 (Endo), -082 (MIC) 50502-059 30121-025 30128-080 30128-679 (MIC) 30121-023 30128-021 30121-023 30121-195 40128-110 30121-390 30128-668 30121-431 51708-043 51501-167 30127-011 50610-009 30121-086 51604-035 256 / 266 30128-022 30128-680 (MIC) 51031-043 51501-190 51501-191 51501-192 51611-051 (Fuses) 51501-167 51603-000 A APPENDIX A ICC 350 M-Doku 10128-081 50502-059 30121-025 30121-023 30121-023 40128-101 30128-021 30121-390 30128-668 30121-195 Art.-No. 80116-201 09 / 2004 30128-533 51501-167 51708-043 30121-086 A APPENDIX A 30127-011 51601-025 50610-009 50600-021 51031-043 30128-671 51501-190 51501-191/-192 51603-000 51611-051 51501-167 257 / 266 ICC 350 Z 10128 -065 50502-059 30121-025 30128-083 30128-085 30121-086 51501-167 258 / 266 30121-023 30128-021 30127-011 51604-035 30121-023 40128-101 30121-195 30121-431 30121-390 50610-009 51601-025 51031-043 51501-190 51501-191 51501-192 51611-051 51501-167 51603-000 A APPENDIX A ICC 350 T 10128-066 50502-059 30121-025 30121-023 30128-021 30121-023 40128-101 30121-195 30121-390 Art.-No. 80116-201 09 / 2004 30128-089 51501-167 A 30128-085 30127-011 30121-086 APPENDIX A 51604-035 50610-009 51601-025 51031-043 51501-190 51501-191 51501-192 51611-051 51501-167 51603-000 259 / 266 ICC 350 M (INT) 10128-083, -310 30128-725 50502-059 30128-606 30128-726 40128-101 30121-390 30128-021 30128-668 30128-728 30128-691 51501-167 51708-043 30121-086 260 / 266 30127-011 51601-025 50610-009 51031-043 30128-204 51501-190 51501-191 51501-192 51603-000 51611-051 A 51501-167 APPENDIX A ICC 350 M 10128-080 50502-059 30121-025 30121-023 30128-021 30121-023 40128-101 30121-390 30128-668 30121-195 Art.-No. 80116-201 09 / 2004 30128-533 51501-167 51708-043 30121-086 A APPENDIX A 30127-011 51601-025 50610-009 51031-043 30128-671 51501-190 51501-191/-192 51603-000 51611-051 51501-167 261 / 266 ICC 350 Boards 40128-101 40128-110 (F) Gezeich. = Drawn Geprüft = Checked Freigabe = Approv. Datum = Date* Name = Name Maßstab = Scale Datei = File Projekt = Project Benennung = Title Nummer = Number Ers. für = Replaces Ers. durch = Repl. by 262 / 266 A APPENDIX A Appendix B Abbreviations, Notes, Addresses 264 / 266 B APPENDIX B Appendix Abbreviations Notes Addresses Abbreviations The following list summarizes all those abbreviations and symbols which are used in this service manual. Abbreviation means NE neutral electrode Abbreviation means ö phase angle | non-split NE V(p) volts (peak value) || split NE A(eff) amperes (r.m.s. value) Parts lists This service manual includes no parts lists. However, if you should need to refer to part numbers, please see Appendix A. Measuring equipment For a list of recommended measuring equipment for servicing the units ICC 200, ICC 300 and ICC 350, please refer to this service manual (Chapter 1, Test program 16). Diagrams of electrical dimensions The diagrams of the electrical dimensions are not shown in this service manual. However, you will find these printed in the instruction manuals for the respective unit. Art. No.: 80116-201 09 / 2004 Any questions? This service manual has been put together carefully and was subjected to a continuous improvement process during its creation by the Service Department and/or the Development Department at ERBE Elektromedizin. Nevertheless, you may still have questions; additionally, this manual cannot assume to be perfect and completely without error. In such cases, please contact: Contents, formulation, structure, technical information Technical questions regarding service and the units Dipl.-Phys. Michael Grosse (Development Dept.) Service Manager Roland Bauer (Service Dept.) Tel.: (+49) 70 71 / 755–254 Tel.: (+49) 70 71 / 755–454 E-mail: [email protected] E-mail: [email protected] B APPENDIX B 265/ 266 Your notes
