hu2008

2008 IEEE Pacific-Asia Workshop on Computational Intelligence and Industrial Application
An Algorithm about Transforming PLC Ladder Diagram to Instruction List
Based on Series-parallel Merging Method
Feihu Hu, Liang Fu, Le Liu, Guanqun Zhang
College of Electrical Engineering,
Xi’an JiaoTong University, Xi’an, ShaanXi, 710049, China
[email protected], [email protected]
declarability of list are a little worth. We obtain logic
relations by binary tree, not depending on meaning of
graphical symbols, and then the Instruction List is got by
post order traversing binary tree. Therefore this
transformation is a general transformation, and especially
does well in speeding up interpretive execution. This
paper proposes a new transformation algorithm Method
based on Series-parallel Merging. The algorithm is
achieved by transforming AOV digraph which is mapped
form LD to binary tree. It clearly expresses the levels of
LD, does well in picking up the structure of LD and
especially can be used in transformation of complex LD
into IL.
Abstract
Usually there are 3 steps in transforming PLC ladder
diagram to instruction list: including mapping ladder
diagram to AOV digraph, transforming AOV digraph to
binary trees and transforming binary trees into instruction
list. The second step is the most critical and complicated.
This paper proposes a method that can transform the AOV
digraph to binary trees by using Series-parallel Merging
thought, which is visual and easy to realize. An example
of transformation is given, which introduced the
algorithm and transforming steps.
1. Introduction
2. Data Structures of AOV Digraph and
Binary Tree Node in the Transformation
Algorithm
Ladder Diagram (LD) and Instruction List (IL) are the
widely used programming languages for PLC. In a LD,
various graphical symbols are used to represent
instructions, and graphical symbols are connected in
series or parallel intend to represent logic sequence.
Therefore, LD programs are very visual, and can represent
control logic explicitly. However, LD programs can not
be executed directly by PLC. On the other hand the IL is
similar to the assemble language, and consists of a series
of user-defined instructions according to the IEC61131-3
standard. Each instruction is composed of operation codes
and operands. IL programs can be processed directly by
PLC. Therefore, it is necessary to realize transformation
from the LD into the IL in PLC systems [1]. References
[2, 3] present a transformation method that is achieved by
traversing AOV digraph, which is mapped from LD. The
transformation method is based on Topological sort
algorithm. Although the transformation method can work
well in some cases, it is not general-utility, and can not do
well in processing the multi-paralleled situation or
searching the virtual vertices of LD. Reference [4]
presents a transformation from PLC Ladder Diagram to
Lists. The algorithm translates the ladder diagram into
directed acyclic graph, sorts and unites the serial and
parallel relationship of the graph, and stores the
serial-parallel structure in lists, generates the instruction
list based on the lists. But the intelligibility and the
978-0-7695-3490-9/08 $25.00 © 2008 IEEE
DOI 10.1109/PACIIA.2008.13
A PLC LD program is composed of some graphical
symbols connected complying with the rules, and is
executed from the top down and from left to right.
Therefore, a LD essentially corresponds to a digraph. A
graphical symbol in a LD can be abstracted as an edge in
an AOV digraph, and interconnection relations between
graphical symbols can be abstracted as vertices in an
AOV digraph. In a LD, methodically permutable ladders
can be represented to the binary tree forest, and we can
get the corresponding IL by post order traversing every
binary tree. This transformation especially does well in
speeding up interpretive execution.
2.1. Definition and Data Structure of AOV
Digraph
A digraph G in which the vertices represent tasks or
activities and the edges represent precedence relations
between tasks is an activity on vertex digraph or AOV
digraph. Vertex i in an AOV digraph G is a predecessor of
vertex j iff there is a directed path from vertex i to vertex
j. Vertex i is an immediate predecessor of j iff <i, j> is an
edge in G. If i is a predecessor of j, then j is a successor of
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node with degree greater than two. For binary trees we
distinguish between the subtrees on the left and on the
right, and for a LD program the priority of operating
graphical symbols in left section is higher than that of
graphical symbols in right section [5]. We use binary trees
to represent the logic relations 'AND' and 'OR' in a LD
program. In detail, leaf nodes represent graphical symbols,
and non-leaf nodes represent the logic relations between
left subtree and right subtree.
We define the data structure of a binary tree node as
follows:
struct TwoTree
{
int NodeType; // type of binary tree: leaf node or
// non-leaf node
int Typedata;
// type of leaf node to distinguish
// graphical symbols
struct TwoTree *left; //store a pointer of left subtree
struct TwoTree *right; //store a pointer of right
// subtree
} TwoTree;
i. If i is an immediate predecessor of j, then j is an
immediate successor of i[5].
We can use adjacency matrix, adjacency list or
orthogonal list as the data structure of AOV digraph. In
this paper, orthogonal list is used for the data structure of
AOV digraph. In orthogonal list, each vertex or arc in the
corresponding directed graph has a node. The basic
structure is as shown in Figure 1.
Figure 1
Data structure of orthogonal list.
We define the data structure of a graphical symbol as
follows in order to store information of each graphical
symbol in LD programs:
const int MAX_VERTEX_NUM=2000;
//maximum number of orthogonal list’s vertices
typedef struct ArcBox
// data structure of arc
{
int tailvex, headvex; // position information of arc’s
// head vertex and tail vertex
ArcBox *hlink; // pointer pointed to arc’s chain area
//where arcs have the same head
ArcBox *tlink; // pointer pointed to arc’s chain area
//where arcs have the same tail
TwoTree* TwoTreeinfo; // related binary trees
//information stored in the arc
}ArcBox;
typedef struct VexNode // data structure of vertex
{
int data; // position information of vertex
ArcBox *firstIn; // pointer pointed to the first input
// arc whose tail vertex is this vertex
ArcBox *firstOut;
// pointer pointed to the first
// output arc whose head vertex is this vertex
}VexNode;
typedef struct // data structure of orthogonal list
{
VexNode xList[MAX_VERTEX_NUM];
// list of all the vertices
int vexNum, arcNum; // current number of arc and
//vertices of this orthogonal list
}OLGraph;
3. Description
Algorithm
of
the
Transformation
Usually there are 3 steps in transforming LD to IL. The
main ideas of the transformation are described as follows:
In the first step, we transform LD program to AOV
digraph. We use double linked list to store information of
graphical symbols; and then we divided the generated
double linked list into a series of relatively independent
function modules; at last we should scan the function
modules from left to right and from top down, and use
orthogonal list to store the generated AOV digraph[7].
In the second step, we transform the generated AOV
digraph to binary trees. This step is the most critical and
complicated. This paper proposes a method by using
Series-parallel Merging thought; infra it is described in
detail.
In the third step, we transform the generated binary
trees to IL program. We realize it by post order traversing
the binary trees [6].
3.1. Introduction of Series-parallel Merging
Thought
LD uses series parallel connection of the graphical
symbols to represent consecution. No matter how
high-level complex LD logical relations, all of them are
made of the most basic series parallel connections which
are multi-level-nested and intercombined.We represent
the most basic series parallel connections by using binary
trees; and then we transform the AOV digraph’s several
series or parallel basic arcs to an arc pointing to the
corresponding new generated binary tree’s root. In this
2.2. Definition and Data Structure of Binary Tree
Node
A binary tree is an important type of tree structure
which occurs very often. It is characterized by the fact that
any node can have at most two branches, i.e., there is no
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paper, we use signs ' * ' and ' + ' to represent the logic
relations ' AND ' and ' OR ' in all pictures.
Figure 2
arcNum=1, it means the AOV digraph is the simplest
AOV digraph and then we in turn examine every element
of the array xList which stores the vertices’ information; if
a firstOut pointer in one of the vertex data structures is not
null, we take out the TwoTreeinfo pointer from the arc
pointed by the firstOut pointer; the acquired TwoTreeinfo
pointer points to a root node of the binary tree which
represented the AOV digraph. Then the transforming is
over.
② If vexNum! =2 and arcNum! =1, it means that the
AOV digraph isn’t the simplest. In this case, we do
parallel merging to the AOV digraph. We in turn examine
every element of the array xList; if a firstOut pointer in a
vertex data structure is not null, we for the moment call
the element of xList xList[i] and take out hlink pointer
and tailvex of the arc pointed by the firstOut pointer; if
xList[tailvex]’s firstin pointer isn’t null, we in turn
traverse the linked list pointed by xList[i]’s hlink and find
out the same arcs in the linked list pointed by
xList[tailvex]’s tlink; then we in turn chain the same arcs’
TwoTreeinfo pointers by 'OR' binary nodes, save the new
generated root node pointer in one of the same arcs and
delete other same arcs in the linked lists pointed by hlink
and tlink; we subtract the number of the linked list’s
deleted arcs from arcNum; and then an element of the
array xList has been processed and we go on processing
the next element of the array xList. After processing all
elements of the array xList, if vexNum=2 and arcNum=1,
turn to step ①，otherwise turn to step ③.
③ If vexNum! =2 and arcNum! =1, it means that the
AOV digraph isn’t the simplest. In this case, we do series
merging to the AOV digraph. We in turn examine every
element of the array xList; if a firstOut pointer in a vertex
data structure is not null, we for the moment call the
element of xList xList[i] and take out hlink pointer and
tailvex of the arc pointed by the firstOut pointer; if there is
only one element in the linked list pointed by the hlink
and there is also only one element in the linked list
pointed by the hlink in the arc pointed by xList[tailvex]’s
firstOut pointer, we chain the two same arcs’
TwoTreeinfo pointers by 'AND' binary nodes, save the
new generated root node pointer in the arc pointed by
xList[i]’s firstOut pointer and give the value of
xList[tailvex]’s tailvex to xList[i]’s tailvex; at last we
delete all information in xList[tailvex], subtract 1 from
arcNum and subtract 1 from vexNum; and then an
element of the array xList has been processed and we go
on processing the next element of the array xList. After
processing all elements of the array xList, if vexNum=2
and arcNum=1, turn to step ①，otherwise turn to step ②.
Simplification processes of basic parallel and
series relations
3.2 Main Ideas of the Algorithm
There is only one arc in the simplest AOV digraph.
The AOV digraph simplified once by using Series-parallel
Merging thought is not always the simplest; if it isn't the
simplest we go on simplifying the simplified AOV
digraph by cycling operation until it is. When we get the
simplest AOV digraph, the only arc points to a root node
of binary tree and the binary tree represent the initial
AOV digraph.
Start
Do parallel merging to
the AOV digraph.
Y
Is the AOV
digraph simplest?
N
Do series merging to
the AOV digraph.
Is the AOV
digraph simplest?
N
Y
End
Figure 3
The flow chart of transformation
3.3 Realization Steps of Building Binary Tree
from the AOV Digraph
4. A Transformation Example
① Examine the number of vertices (vexNum) and arcs
(arcNum) saved in orthogonal list;If vexNum=2 and
The left of Figure 4 is an example of a LD application
program which contains complex logic relations, stating
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the logic equation (1).
The right of Figure 4 is the AOV digraph of the LD
program, and the virtual nodes (①, ②, ③, ④, ⑤, ⑥,
⑦, ⑧) respectively represent the parallel lines (vertical
lines) between graphical symbols showing on the left of
Figure 4.
Y1=((X1+X2+X3)*(X4+X5)*(X6+X7)+(X9+X10)*(X11+X12)
)*((X13+X14)*(X15+X16) +X17)
(1)
Figure 4
Ladder Diagram and corresponding AOV Digraph
order traversing the binary tree in (d). This IL application
program indicates the logic equation (2).
Process the initial AOV digraph by the transformation
algorithm. The (a), (b), (c) and (d) of Figure 5 describe the
process by detailed. It can be seen that it takes twice
series-parallel merging to transform the AOV digraph to
final binary tree, which is shown at the lower in (d).
Figure 6 is an IL application program formed by post
Y1= X1X2X3++X4X5+X6X7+**X9X10+X11X12+*+
X13X14+X15X16+*X17+*Y1*
(2)
Obviously, (1) and (2) is equivalent. Thus, this
transformation algorithm is correct.
(a) The first parallel simplification.
(b) The first series simplification.
(c) The second parallel simplification.
(d) The second series simplification.
Figure 5 The transformation example
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LD
LD
LD
O R
O R
LD
LD
O R
LD
LD
O R
A N
A N
LD
LD
O R
LD
LD
O R
A N
O R
LD
LD
O R
LD
LD
O R
A N
LD
O R
A N
LD
A N
[6] Ge Fen, Wu Ning. Transformation Algorithm Between
Ladder Diagram and Instruction List Based on AOV
Digraph and Binary Tree [J]. Journal of Nanjing University
of Aeronautics &A stronautics, 2006, 38(6): 754-758.
[7] Wu Qian ,Tao Yi-yi ,Lu Chun yuan.Design and
Implementation of Language Editing System in Sof tPLC
Based on XML[J]. Mechanicnl Manufacture &
Automation, 2007, (2): 100-102.
X 1
X 2
X 3
X 4
X 5
X 6
X 7
D
D
X 9
X 10
X 11
X 12
D
X 13
X 14
X 15
X 16
D
D
X 17
Y 1
D
Figure 6
The generated IL
5. Conclusions
In this paper, we have proposed a series-parallel
merging transformation algorithm from the LD into the IL
based on AOV digraph and binary tree. The algorithm is a
general transformation algorithm, and especially can be
used in transformation of complex LD into IL. This
algorithm has been applied to a self-developed software
for editing PLC program. It is proved by practical
application that this algorithm can extract the IL from the
LD completely, and can be used for the complex LD.
Comparing to traditional topological sorting algorithm,
this algorithm puts forward another way to transform LD
to IL.
References
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[3] Tan Jinjie , Cheng Lianghong , Yin Xuepeng. Mapping
from Ladder Diagram to AOV Graph in Embedded PLC
[J]. Computer Measurement & Control, 2004,
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[4] Lin Maokai, Wang Xiaofang, Lin Heng .Transformation
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