TABLE 5.1 Unloaded BJT Transistor Amplifiers Configuration Fixed-bias: Medium (1 k⍀) Medium (2 k⍀) High (- 200) High (100) � bre (RB Ú 10bre) – Zi RB 7 bre = Vo Zo Voltage-divider bias: Ai + + – Av RC RB Vi Zo VCC Io Ii Zi Medium (1 k⍀) VCC Io Ii R1 7 R2 7 bre = RC R1 Zo Zi Vi R2 – RE VCC Ii Io RB Vi – = RC Zo � Vo = RB – RB 7 Zb Zb � b(re + RE) + Vi RE Io Zi Zo + – (RE W re) Vo Low (20 ⍀) Ii + – Collector feedback: RB 7 bRE � Common-base: Vi Zi + RC Io RE = VEE VCC – RE 7 r e Ii + re RC 1 + b RF + Zo Vo (ro Ú 10RC) – – RC b High (- 200) High (50) - = RC 7 r o re � - RC re = b(R1 7 R2)ro (ro + RC)(R1 7 R2 + bre) b(R1 7 R2) � R1 7 R2 + bre (ro Ú 10RC) (ro Ú 10RC) Low (- 5) High (50) - = RC r e + RE � - � - bRB RB + Zb RC RE (RE W re) Low (20 ⍀) = RE 7 r e � re (RE W re) Medium (2 k⍀) = RC Low ( �1) = RE RE + r e High (- 50) � - bRB RB + Zb � 1 High (200) � Low (- 1) � -1 RC re (RE W re) Medium (1 k⍀) VCC � RC re (ro Ú 10RC) (any level of ro) � re Zo Vo Io RF Vi Z o RC RB 7 bRE High (100 k⍀) VCC Ii = - bRBro (ro + RC)(RB + bre) (ro Ú 10RC, RB Ú 10bre) Medium (2 k⍀) – Emitterfollower: � RC (RE W re) RE Zi RB 7 Zb Zb � b(re + RE) + + RC 7 r o – High (100 k⍀) Unbypassed emitter bias: Medium (2 k⍀) = re RC (ro Ú 10RC) = (RC 7 ro) - = (ro Ú 10RC) Vo CE � � + + RC 7 r o = = Medium (2 k⍀) � RC 7 RF (ro Ú 10RC) High (50) High (- 200) � - RC re (ro Ú 10RC) (RF W RC) = bRF RF + bRC � RF RC 293 TABLE 5.2 BJT Transistor Amplifiers Including the Effect of Rs and RL Configuration AvL � Vo >Vi Zi Zo -(RL � RC) RB 7 bre RC RB 7 bre RC 7 r o R1 7 R2 7 bre RC R1 7 R2 7 bre RC 7 r o RЈE = RL 7 RE RЈs = Rs 7 R1 7 R2 re Including ro: - (RL 7 RC 7 ro) re -(RL 7 RC) re Including ro: -(RL 7 RC 7 ro) re � 1 R1 7 R2 7 b(re + RЈE) RE � a RЈs + re b b R1 7 R2 7 b(re + RЈE) RE � a RЈs + re b b Including ro: � 1 � -(RL 7 RC) RE 7 r e RC RE 7 r e RC 7 r o R1 7 R2 7 b(re + RE) RC R1 7 R2 7 b(re + Re) � RC re Including ro: � -(RL 7 RC 7 ro) re VCC -(RL 7 RC) RE RC R1 Rs + Vs – 294 Vo Including ro: Vi Zo Zi RL R2 RE -(RL 7 RC) RE TABLE 5.2 (Continued) BJT Transistor Amplifiers Including the Effect of Rs and RL AvL � Vo >Vi Configuration Zi Zo RB 7 b(re + RE1) RC RB 7 b(re + RE) � RC VCC -(RL 7 RC) RC RB Rs RE1 Vo Vi Zo + Zi Vs – Including ro: RL RE1 RE2 -(RL 7 RC) REt CE VCC -(RL 7 RC) RC re RF Rs Zo + RC Including ro: RL -(RL 7 RC 7 ro) Zi – RF � Av � Vo Vi Vs bre � bre � re RF 0 Av 0 RC 7 RF 7 r o VCC -(RL 7 RC) RC RF Rs – RF 0 Av 0 � RC 7 RF Vo Vi Including ro: Zo + Vs bRE � RE RL � RE L Zi -(RL 7 RC) RE � bRE � RF 0 Av 0 � RC 7 RF packaged system relates to the actual amplifier or network. The system of Fig. 5.61 is called a two-port system because there are two sets of terminals—one at the input and the other at the output. At this point it is particularly important to realize that the data surrounding a packaged system is the no-load data. This should be fairly obvious because the load has not been applied, nor does it come with the load attached to the package. + Vi Ii Io Zi Zo AvNL – + Vo – Thévenin FIG. 5.61 Two-port system. 295