Subido por Cristofher Omar Cruz Romero

Practica 3 Codigo

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Código:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity E1 is
Port ( PI : in STD_LOGIC;
PD : in STD_LOGIC;
SW : in STD_LOGIC;
C : in STD_LOGIC;
AL : out STD_LOGIC);
end E1;
architecture Behavioral of E1 is
begin
AL <= (not PI) or (not PD) or (SW and (not C));
end Behavioral;
Asignación de pines.
NET "PI" LOC="P1";
NET "PD" LOC="P5";
NET "SW" LOC="P7";
NET "C" LOC="P9";
NET "AL" LOC="P11";