Manual de Servicio lg 42pj350r a

Internal Use Only
North/Latin America
Europe/Africa
Asia/Oceania
http://aic.lgservice.com
http://eic.lgservice.com
http://biz.lgservice.com
PLASMA TV
SERVICE MANUAL
CHASSIS : PP01A
MODEL : 42PJ350R
42PJ350R-MA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL62881410(1005-REV02)
Printed in Korea
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................7
BLOCK DIAGRAM ...................................................................................................................15
EXPLODED VIEW .................................................................................................................. 16
SVC. SHEET ................................................................................................................................
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements for each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Due to high vacuum and large surface area of picture tube,
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
0.15uF
1.5 Kohm/10W
LGE Internal Use Only
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
V
Application Range
This spec is applied to PDP TV used PP01A Chassis.
V
Model Name
Market Place
Brand
42PJ350R-MA
Central and South America
LG
Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10%
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V
Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC
V
Model Name
Market
Remark
Appliance
42PJ350R-MA
Central and South America
Safety : IEC/ EN60065, EMI : CISPR13
TEST
Module Specification
(1) 42” XGA
No
Item
Specification
1
Display Screen Device
106 cm (42 inch) 16: 9 Color Plasma Display Module
2
Aspect Ratio
16:9
3
PDP Module
PDP42T1###,
Remark
PDP
Glass Filter
RGB Closed Type
4
Operating Environment
1) Temp. : 0 deg ~ 60 deg
2) Humidity : 20 % ~ 80 %
5
Storage Environment
LGE SPEC.
3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
6
Input Voltage
AC 100 V - 240 V, 50 / 60 Hz
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-4-
Maker : LGIT
LGE Internal Use Only
V
Model General Specification
(1) Central and South America (MA)
No
Item
Specification
1
Market
Central and South America
2
Broadcasting system
NTSC, PAL-M, PAL-N
3
Available Channel
BAND
NTSC
VHF
2~13
UHF
14~69
CATV
1~125
4
Receiving system
5
Video Input (2EA)
PAL,SECAM, NTSC
6
Component Input (2EA)
Y/Cb/Cr, Y/ Pb/Pr
7
RGB Input (1EA)
RGB-PC
8
HDMI Input
Remark
Upper Heterodyne
2ea
Rear 1EA, Side 1EA
HDMI-DTV , Only PCM MODE
Side HDMI(1), Rear HDMI(1)
: 42/50PJ250-MA only
3ea
9
Audio Input (5EA)
Side HDMI(1), Rear HDMI(2)
L/R Input(PC 1EA, Component 2EA,
Rear 1EA, Side 1EA)
10
RS-232C (1EA)
Remote control
11
USB Input (1EA)
SD DivX, MP3, JPEG,
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
PJ250R Rear USB only for service
-5-
LGE Internal Use Only
A
Chroma & Brightness (Optical)
(1) (With 38% Filter) 42” T1 module
No
Item
Min
Typ
Max
Unit
Remark
(*) Special Peak Brightness Mode
- 1/ 100 ~ 3/ 100 white window Pattern
60Hz : 315
-
cd/ m
2
50Hz : 315
1
(typically 1% window size)
- Picture Mode : Vivid
White peak Brightness
- Mode : HDMI
- Resolution : 1920 x 1080 60H
2
3
White average brightness
Brightness uniformity
-
cd/ m
2
(*) Normal Mode
60Hz : 161
60Hz : 173
50Hz : 148
50Hz : 161
60Hz : 47
60Hz : 52
50Hz : 46
50Hz : 50
-10
0
+10
0.270
0.285
0.300
White 216 level pattern
0.308
Red/ Green/ Blue : 255 level pattern
- 25 white window pattern
- Picture Mode : Vivid
2
cd/ m
- Full White Pattern
- Picture Mode : Vivid
- 85IRE Full White Pattern
- Picture Mode: Vivid
4
Color
coordinate
White
X
Y
0.278
0.293
Red
X
0.635
0.640
Y
0.318
0.330
0.340
X
0.242
0.300
0.305
Y
0.595
0.600
X
-
0.150
0.158
Y
-
0.060
0.070
Green
Blue
-
-
- White : 1/ 100 White Window Pattern
5
Contrast ratio at dark room
100,000: 1
( Peak Mode )
1,000,000 :1
- Black : Full Black
- Picture Mode : Vivid
6
7
Color coordinate uniformity
Colour
-0.01
Average
+0.01
0.261
0.276
0.291
- 85IRE Full White Pattern
- Picture Mode : Vivid
Cool
X
Y
0.268
0.283
0.298
- Picture Mode : Vivid
Medium
X
0.270
0.285
0.300
- Warm, Cool : Color Temp. UI 30
Y
0.278
0.293
0.308
- Medium : Color Temp. UI 0
X
0.298
0.313
0.328
Y
0.314
0.329
0.344
Temperature
Warm
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-6-
- 85IRE Full White Pattern
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
3-5. Download Method (By using MSTAR JIG)
1. Application Range
This spec sheet is applied to all of the PP01A chassis.
(1) Preliminary Steps
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V
~ 240 V, 50 / 60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C
- In case of keeping module is in the circumstance of 0 °C,
it should be placed in the circumstance of above 15 °C
for 2 hours
- In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above
15 °C for 3 hours,.
1) Connect the download jig to D-sub jack
3. S/W Program Download
3-1. Profile
2) Connect the PC to USB jack
This is for downloading the s/w to the flash memory of the
IC402
3-2. Equipment
(2) Download Steps
1) Execute ‘ISP Tool’ program in PC, then a main window
will be opened
(1) PC
(2) ISP_tool program
(3) Download jig
3-3. Connection Structure
Double click
2) Click the connect button and confirm “Dialog Box”.
3-4. Connection Condition
(1) IC name and circuit number : Flash Memory and IC402
(2) Use voltage : 3.3V (5 pin)
(3) SCL : 15 pin
(4) SDA : 12 pin
(5) Tact time : about 2min and 30seconds
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
3) Click the Config button and Change speed
E2PROM Device setting : over the 350Khz
3-6. Download Method (By using USB
Memory Stick)
Caution
- Using ‘power on’ button of the control R/C, power on TV.
- USB file (EPK) version must be bigger than downloaded
version of main B/D.
- It should be only one SW binary file in USB Stick
(1) Using ‘Power ON’ button of the control R/C, Power on TV.
(2) Insert the USB memory stick to the SET.
(3) Display USB loding message then, push the ‘Exit’ Key of
control R/C
(4) Push the ‘MENU’ Key and move the cusor ‘OPTION’ of
OSD ( Fig. 1)
* Caution: Don’t push the ‘OK’ key.Just cusor is on the
‘OPTION’ menu.
4) Read and write bin file
Click “(1)Read” tab, and then load download
file(XXXX.bin) by clicking “Read”.
( Fig. 1)
(5) Push the “7” key of control R/C continuously.
Then, Display “TV Software Update” Pop-up menu. (Fig. 2)
5) Click “Auto(2)” tab and set as below
6) Click “Run(3)”.
7) After downloading, check “OK(4)” message.
( Fig. 2)
(6) Select SW file (XXXX.bin) you want, push the “OK” Key.
(7) S/W download process is excuted automatically.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
4. PCB Assembly Adjustment Method
4-1. Option Adjustment Following BOM
Tool Option
Area Option
Option 1
Option 2
Option 3(Available for EU & Non EU model)
CSA Model
Tool option
Area option
42PJ25*R-M*
1
40
50PJ25*R-M*
2
40
42PJ35*R-M*
3
40
50PJ35*R-M*
4
40
42PJ26*R-M*
5
40
50PJ26*R-M*
6
40
50PK55*R-M*
7
40
60PK55*R-M*
8
40
(6) EDID D/L Method
After software D/L or PCBA manufacturing, you can
download EDID Data.
When you adjust Tool Option, H6 Model EDID download
process is executed automatically
* If the model don’t have HDMI 3, HDMI 3 will be disappeared
at OSD Window.
( Fig. 3)
* Profile: Must be changed the option value because being
different with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
(1) Push the IN-START key in the Adjust R/C.
(2) Enter Password number. The value of Password is “0 0 0
0”.
Caution
- When you adjust tool option, don’t connect HDMI or Dsub cable.
- If you connect some cable, EDID D/L process will be
failed.
(7) Adjustment method
Before PCBA check, have to change the Tool option and
Area option
[ About PDP
After done all adjustments, Press IN-START button and
compare Tool option and Area option value with its BOM, if
it is correctly same then Change “RF mode” and then
unplug the AC cable.
If it is not same, then correct it same with BOM and unplug
AC cable.
(3) Input the Option Number that was specified in the BOM,
into the Shipping area.
(4) Select “Tool Option” by using D/E(CH+/-) key, and press
the number key(0~9) consecutively
ex) If the value of Tool Option1 is 4, input the data using
number key “4” (Fig. 3)
For correct it to the model’s module from factory JIG
model.
[ Don’t push The IN-STOP KEY after completing the function
inspection.
(5) if it is EU model ( such as 42/50PJ**R-ZA ), select “Area
option” by using D/E(CH+/-) key , and press the number
key(0~9) consecutively.
ex) If the value of Area Option is 40, input the data using
number key “40” (Fig. 3)
Caution
- Don’t Push “IN-STOP” key after PCB assembly
adjustment.
* PP01A/B/C Tool option
Model
Tool option
50PJ250R-TA
16
42PJ250R-ZA
23
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
<CSA AREA>
5. EDID(The Extended Display
Identification Data)
Caution
- Never Use the cable( HDMI or D-sub cable) for EDID
Writing.
- Automatically PP01A/B/C Model EDID download process
is executed when you adjust Tool Option.
< Jack Layout>
<NON-EU AREA>
<Tool Option Item>
Inch
Tool
SIDE AV
0/1
HDMI
0/1/2/3
Side HDMI
0/1
COMP2
0/1
RGB
0/1
RS232C
0/1
Local Key
0 (7KEY) / 1 (8KEY)
LED TYPE
0 (RED) / 1 (RED/White) / 2 (Reserve)
USB TYPE
0 (NONE) / 1 (PHOTO, MUSIC)
/ 2 (PHOTO, MUSIC, DivX)
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
<EAST EU / CIS AREA>
O
XGA EDID DATA ( 42 inch)
<Analog(RGB) : 128bytes>
<HDMI 1 : 256bytes>
<HDMI 2 : 256bytes>
5-1. EDID Data
NO
Item
Condition
1
Manufacturer ID
GSM
Hex Data
1E6D
2
Version
Digital : 1
01
3
Revision
Digital : 3
03
<HDMI 3 : 256bytes> SIDE HDMI(HDMI 3)
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
Notice : After All mode check, set the Speaker Volume “0”.
6. HDCP(High-Bandwidth Digital
Contents Protection) Download
HDCP download process is deleted in PP01A/B/C Chassis
In PP01A/B/C Chassis, it is usi g the EEPROM masking
HDCP Key
Caution
- Do not connect external input cable
- Adjustment result is applied to SET On/Off later.
AV / Component / RGB input
NO SIGNAL or White noise
NO SIGNAL
Notice : From this sentence, All working is mass production.
8. POWER PCB Assy Voltage
Adjustment
(Vs voltage Adjustment)
7. Manual ADC Adjustment
(Component 1, RGB)
RF input
Caution : Don’t Press the Power Key on Remote Controller.
Just AC Power Off. ( Not DC off )
8-1. Test Equipment: D.M.M 1EA
8-2. Connection Diagram for Measuring
Refer to (Fig. 4)
* Adjustment is done using internal ADC, so input signal is not
necessary.
8-3. Adjustment Method
7-1. COMPONENT input ADC (SD / HD),
RGB input ADC
(1) Press ADJ key on R/C for adjustment. Need not convert
input mode.
(2) Enter Password number. The value of Password is “0 0 0
0”.
(3) Select “0. ADC calibration” by using D/E(CH +/-) and press
ENTER(V).
(4) Start ADC adjustment by using F / G (VOL +/-) or press
ENTER(V).
(5) Both component and RGB ADC adjustment are executed
automatically
(1) Vs Adjustment
1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR901, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top
( deviation ; ±0.5V)
(2) Va Adjustment
1) Connect + terminal of D. M..M. to Va pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR502, voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top
( deviation ; ±0.5V)
When ADC adjustment is finished, this OSD appear.
(Fig. 4)
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
8-4. Adjustment of Area option.
9. Adjustment of White Balance
(1) Area Option Adjustment following BOM
(Including SKD models )
Tool Option
Area Option
Option 1
Option 2
Option 3 ( Available for EU & Non EU model )
9-1. Required Equipment
(1) Remote controller for adjustment
(2) Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc : CH 10 (PDP)
lease adjust CA-210, CA-100+ by CS-1000 before
measuring
(3) Auto W/B adjustment instrument(only for Auto adjustment)
9-2. AUTO White Balance Process.
Before Adjust of White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command.
O
..
* Profile : Must be changed the option value because being
different with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
1) Push the IN-START key in the Adjust R/C.
2) Enter Password number. The value of Password is “0 0
0 0”.
CS-1000/CA-100+/CA-210(CH 10) White balance adjustment
coordinates and color temperature.
CSM
Color Coordinate
Temp
Color Coordinate
x
y
Cool
0.276
0.283
11000K
0.002
Medium
Warm
0.285
0.293
9300K
0.002
0.313
0.329
6500K
0.002
9-3. Manual W/B process (using adjusts
Remote control)
(1) Enter ‘PICTURE RESET’ on Picture Mode, then turn off
Fresh Contrast and Fresh colour in Advanced Control
(2) After enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern off of service mode, and change off ->
on.
(4) Enter “W/B ADJUST” by pushing “ G ” key at “3. W/B
ADJUST”.
(5) Adjust W/B DATA, for all CSM, choose ‘COPY ALL’
3) Input the Area Option Number that was specified in the
BOM, into the Shipping area.
4) Select “Area Option” by using D / E (CH+/-) key, and
press the number key(0~9) consecutively
ex) If the value of Area Option 40, input the data using
number key “40” (Fig. 3)
* Gain Max Value is 192. So, Never make any Gain Value
over 192 and please fix one Value on 192, between R, G
and B.
R-GAIN
Caution:
- Although it is SKD model, adjust area option in SET
assemmbly process.
- Don’t Push “IN-STOP” key after PCB assembly
adjustment.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 13 -
Min
Tpy
Max
0
192
192
G-GAIN
0
192
192
B-GAIN
0
192
192
LGE Internal Use Only
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.
(3) Aging time
- After aging start, keep the Power on (no suspension of
power supply) and heat-run over 5 minutes
*Above optical characteristics are should be measured by
following condition.
Measured Mode
Picture Mode
Fresh Contrast
O
Vivid
Off
Fresh Color
Off
Smart Power Saving
Off
DDC Adjustment Command Set
Adjustment
Adjustment
Adjustment
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
BLOCK DIAGRAM
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
120
A2
A21
570
300
LV1
303
A10
301
305
304
202
A9
205
302
203
201
240
A12
580
501
590
200
204
207
206
520
602
910
604
900
601
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
EAX61365502(BPR)
H6 Revolution Circuit Diagram
+5V_ST
[ Slim Jack : 6630TGA004Q ]
E
DDC_SDA1
DDC_SCL1
12
ROM_SDA
11
TMDS1_RXC-
12
10
TMDS1_RXC+
VCC
9
TMDS1_RX0-
7
R110
100
DOUT1
3
R109
100
8
RIN1
R128
13
PC_HS
68
R120
4.7K
ROUT1
4
C103
68pF
9
8
16
5
R514
12K
4
14
DIN1
9
R121
4.7K
TMDS1_RX110
5
TMDS1_RX1+
PC_VS
68
C104
68pF
5
DIN2
TMDS1_RX2-
R112
75
2
15
14
3
13
4
12
EU
11
6
C108
0.1uF
R506
10K
6
7
C2+
C2-
10
7
9
C
SC1_B
SC1_G
R517
75
14
15
R518
75
16
R524
EU
RXD
IR_OUT
R519
75
EU
17
JK103
NONE_EU
[ Slim Jack : EAG59023301_SCREW ]
7A
R103
10K
Q101
RT1C3904-T112
2SC3875S
R126
10K
7B
15
DDC_SCL2
R137
75
4J
NONE_EU
PC_AUD_R
R131
12K
COMP1_PB
5K
R138
75
7L
NONE_EU
R148
5L
NONE_EU 10K NONE_EU
13
12
TMDS2_RXC-
4N
JK106
10
TMDS2_RXC+
9
TMDS2_RX0-
PPJ235-01
5A
8
TMDS2_RX0+
TMDS2_RX1-
7
6
SIDE_VIN
4A
R145
75
R152
10K
3A
5
4
TMDS2_RX1+
3
TMDS2_RX2-
4B
3C
2
4C
TMDS2_RX2+
1
NONE_EU
R140
220K
R149
10K
5M
11
[RD2]CONTACT
5N
[RD2]O-SPRING_2
6N
[RD2]E-LUG
6D
[GN1]E-LUG
NONE_EU
R141
220K
NONE_EU
R147
220K
R159
12K
[GN1]O-SPRING
4D
[GN1]CONTACT
7E
[BL1]E-LUG-S
5E
[BL1]O-SPRING
JK101
7F
[RD1]E-LUG-S
[RD1]CONTACT_1
5G
[WH1]O-SPRING
3
2
R513
10K
9
10
8
+5V_ST
+5V_HDMI_2
A1
2
7
A1
A2
D101
KDS184S
IC101
CAT24C02WI-GT3
A0
R116
10K
WP
A2
VSS
3
6
4
5
R119
10K
C102
0.01uF
25V
A1
SCL
R114
100
A2
SDA
R115
100
VSS
DATA1_SHIELD
1
2
3
8
IC102
CAT24C02WI-GT3
7
6
A0
VCC
R135
10K
WP
R136
10K
1 SIDE_HDMI
DATA2+
C109
0.01uF
25V
A1
SCL
R133
100
A2
SDA
R134
100
VSS
+5V_ST
NONE_HOTEL
MUTE_LINE
Q504
2SC3875S(ALY)
[ EAG41945401 ]
16
+5V_MULTI
D102
KDS184S
17
R501
0
NONE_EU
18
R542
75
1
2
8
7
3
6
4
5
19
VCC
R162
10K
WP
SCL
R160
100
R163
10K
C110
0.01uF
25V
SIDE_HDMI
5
SDA
EU
C116
100uF
16V
EU
20
EU
21
22
SIDE_HDMI
4
TMDS3_RX2-
TMDS3_RX2+
C114
10uF
16V
C
15
+5V_HDMI_3
SIDE_HDMI
D100
KDS184S
VCC
TMDS3_RX1-
DATA2_SHIELD
NONE_HOTEL
R161
100
R502
75
SC2_VIN
AV_DET
MNT_VOUT
R180
5.1
USB_DN
R181
5.1
USB_DP
4
1
DATA0_SHIELD
DATA2-
SPK_R-_HOTEL
MNT_LOUT
B
C
IC100
CAT24C02WI-GT3
A0
DATA1+
R529
470K
11
TMDS3_RX0-
TMDS3_RX1+
HOTEL
R535
1K
12
+5V_ST
+5V_HDMI_1
TMDS3_RXC-
DATA1-
3K
R523
R500
0
NONE_EU
COMP2_R
R539
0
SC2_ID
EU
Q502
2SC3875S(ALY)
14
CLK-
TMDS3_RX0+
EU
E
R522
12K
SIDE_HDMI
5
4
R179
12K
SC2_LIN
EU
SIDE_HDMI
5
R169
220K
EU
8
DDC_SCL3
6
R178
12K
R510 EU
220K
D104
10V
CEC
DATA0+
C111
10uF
16V
B
C
MUTE_LINE
R512
10K
7
COMP2_L
R168
220K
R175
10K
SIDE_HDMI
7
R528
470K
USB DOWN STREAM
8
MNT_ROUT
NONE_HOTEL
6
CEC
TMDS3_RXC+
AUDIO_R
R533
1K
13
NC
DATA0-
HOTEL
R521
12K
SPK_R+_HOTEL
R540
0
CEC_C
DDC_SCL3
CLK+
R509 EU
EU
220K
EU
HOTEL
E
CEC
SCL
CLK_SHIELD
SC2_RIN
4
DDC_SDA3
9
[RD1]E-LUG
DDC_SCL2
10
[RD1]O-SPRING_2
6H
DDC_SDA2
11
5H
A1
12
DDC_SDA3
[WH]GND
D103
30V
A2
13
SDA
D B S
2
PPJ234-01
JK105
EU
R106
56K
C
15
14
DDC/CEC_GND
Q102
RT1C3904-T112
2SC3875S
SIDE_HDMI
[RD1]CONTACT_2
6E
DDC_SCL1
16
E
HPD_MST_3
R511
10K
5
R167
75
R174
10K
[RD1]O-SPRING_1
5E
DDC_SDA1
17
SIDE_HDMI
MMBD301LT1G
+3.3V_MPLL
R532
0
1
COMP2_PR
4F
4H
Q103
BSS83 G
[WH]L_OUT
COMP2_PB
4E
HDMI CEC
R105
10K
[RD]R_OUT
3
R166
75
5D
B
4
3
7C
[ Slim Jack : EAG42463001]
C
NONE_EU
JK116
PPJ241-01
5
5B
5F
R100
1K
R155
12K
NONE_EU
R165
75
5C
SIDE_HDMI
EU
JK115
PSC008-02
COMP1_R
7B
SIDE_RIN
YKF45-7054V
20
R139
75
4A
5C
+5V_HDMI_3
COMP1_PR
COMP2_Y
5D
5A
SIDE_LIN
R158
12K
23
COMP1_L
R154
12K
6A
R146
220K
R153
10K
AV_DET
SHIELD
NONE_EU
14
CEC
TV_VOUT
7K
R124
220K
6B
220uF 16V
EU
R508
75
21
22
R538
5.6K
EU
A1
DDC_SDA2
Q501
E 2SC3875S(ALY)
EU
C115
75
SC1_VIN
COMP1_Y
5J
5
17
16
PC_AUD_L
R130
12K
A2
E
18
20
6J
R123
220K
4
HPD_MST_2
E
B
EU
Q500
2SC3875S(ALY)
EU
R527
EU
19
R125
10K
C
19
+5V_POWER
R525
3K
EU
6A
B
HPD
B
JK107
+5V_HDMI_2
18
C
1K
EU
SC1_FB
C
22
18
PPJ239-01
3
R526
3K
EU R536
SC1_R
TXD
100
R118
PEJ027-01
19
R541
3K
EU
EU
JK100
JACK_GND
+3.3V_MST
12
13
16
C
MUTE_LINE
EU
EU
R113
75
100
R117
20
B
R516
75
YKF45-7058V
R102
1K
EU
Q503
2SC3875S(ALY)
E
11
RIN2
8
C112
10uF
16V
10
C106
0.1uF
DOUT2
TV_LOUT
EU
3K
R520
EU
9
R534
1K
SC1_ID
EU
V-
6
R515
12K
R507
20K
8
C107
0.1uF
R531
470K
EU
SC1_LIN
R504
220K
C1-
5
2
TMDS1_RX2+
MUTE_LINE
Q505
2SC3875S(ALY)
E
8
V+
15
R111
75
C
4
10
ROUT2
5
C113
10uF
16V
B
7
C105
0.1uF
C1+
1
R503
220K
3
TV_ROUT
R530
470K
EU
SC1_RIN
R127
TMDS1_RX0+
1
2
EU
EU
R505
10K
5
GND
ROM_SCL
3
R537
1K
1
2
PC_B
8
3
C100
0.01uF
25V
6
PC_G
2
11
4
IC103
MAX3232CDR
1
DSUB_SCL
7
6
JK113
PC_R
CEC
NONE_EU
4
6
1
13
+3.3V_MPLL
ISP_RX
DSUB_SDA
14
7
EYE_SCL
EYE_SDA
PPJ231-01
HPD_MST_1
17
15
100
SPG09-DB-009
10K
Q100
BOT_HDMI
RT1C3904-T112
2SC3875S
16
R129
4.7K
100
R544
1
B
19
18
R122
4.7K
R543
EU
JK114
PSC008-02
DSUB_SDA
DSUB_SCL
R132
BOT_HDMI
R104
10K
C
100
JK111
C101
0.01uF
25V
SPG09-DB-010
20
NONE_RGBR150
ROM_SDA
ROM_SCL
2
BOT_HDMI
100
3
BOT_HDMI
R101
1K
100
NONE_RGBR144
[ Slim Jack : 6630G00001E ]
JK110
+5V_HDMI_1
100
NONE_RGBR143
KJA-UB-4-0004
JK112
[ Slim Jack : EAG59023302 ]
NONE_RGBR142
23
SHIELD
KJA-ET-0-0032
JK102
[ SIDE HDMI ]
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
H6 R
INPUT
2009/11/05
1
4
INPUT
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
EAX61365502(BPR)
H6 Revolution Circuit Diagram
Power Block
LVDS Block
KEY/IR Interface
P202
SMAW200-H26S1
SEPARATE GND
HD
P203
R1
0
P200
SMAW200-H18S1
ROM_TX
12507WS-12L
R2
0
CGND1
+5V_MULTI
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
IR
R3
0
+17V_TI
R226
4.7K
+3.3V_MPLL
R224
4.7K
GND
2
R4
0
R231
100
HOTEL
R220
10K
CGND2
ERROR_DET
HOTEL
Q202
2SC3052 HOTEL
R232
22
E
R223
10K
KEY1
3
C
B
+3.3V_MPLL
KEY1
IR_OUT
R227
4.7K
HOTEL
R5
0
+5V_ST
4
R6
0
AC_DET
C205
0.01uF
25V
100
L201
MLB-201209-0120P-N2
+5V_MULTI
R203
120-ohm
100
USB
10
P_SDA
TXCE0-
11
12
TXCE0+
TXCE1-
13
14
TXCE1+
TXCE2-
15
16
TXCE2+
TXCLKE-
17
18
TXCLKE+
TXCE3-
19
20
TXCE3+
TXCE4ROM_SCL
21
22
23
24
TXCE4+
ROM_SDA
25
26
R218
+3.3V_MST
GND
6
R8
0
R221
4.7K
CGND4
C212
0.01uF
25V
C208
100uF
16V
SCL
7
LED_BL
A1
R222
4.7K
SDA
8
R248
0
EYE_SDA
READY
GND
9
+3.3V_MST
+3.3V_MPLL
+5V_ST
52
51
ROM_SCL
R4
R207
100K
C1
C210
0.01uF
BS
1
8
C221
0.1uF
SS
L200
CB3216PA501E
READY
READY
R5
0
+5V_MULTI
READY
BU2
SMT-5030D
3.3V_MST
11
LEAD+
3
6
EN
C215 READY
COMP
4
5
C217
4700pF
50V
FB
R1
R213
3.6K
13
10K
R208 R215
68K
R3
C5
ZD201
READY
C213
C9
READY
BUZZ_PWM
LEAD-
47
46
1
45
44
2
C218
22uF
16V
3225
C222
100uF
16V
C224
0.1uF
16V
1
DUMMY
42
3
Q203
2SC3875S(ALY)
READY
41
TXCE0-
40
TXCE0+
E
39
TXCE1-
R225
330
ADJ/GND
38
TXCE1+
1/10W
1%
2
OUTPUT
C
READY
AZ1117H-ADJTRE1(EH11A)
3
READY
R241
100
B
R242
10K
GND
IC202
INPUT
L202
22uH
LED_W
V=0.923X(1+R1/R3)=7.2V
THE RECOMMANDED VALUE OF R3 IS 10K
L1
D1
WHITE_LED
12
R2
48
43
READY
GND
D201
1N4148W
READY
49
P_SCL
DISP_EN
P_SDA
37
TXCE2-
36
TXCE2+
7
1/10W
1%
SW
C204
C202
10uF C8
16V
2
R217
110
IN
50
ROM_SDA
0
READY
R216
R228
C223
C6
+17V_TI
C2
C7
3.3V_MPLL
10
R210
Buzzer ready
IC201
MP2305DS
27
100
R219
470
EYE_SCL
RL_ON/POWER_ON
8
9
LED_R
A2
C
R7
0
M5V_ON
ROM_RX
7
DISP_EN
R230
100
RED_LED
5
R236
6
KEY2
CGND3
19
4
5
P_SCL
R240
10K
KEY2
2
3
KDS184S
D200
1
+5V_ST
IR
1
35
L203
CBC3225T330KR
34
+5V_TU
TUNER
TXCLKE-
C225
100uF
16V
33
TXCLKE+
32
31
TXCE3-
Hotel Option
30
TXCE3+
29
TXCE4-
28
TXCE4+
27
MAIN IC : 4 PAGE
356mA
26
+3.3V_MST
TYPICAL 3A
25
IC200
IC205
AZ1085S-3.3TR/E1
AZ1117H-ADJTRE1(EH11A)
C200
22uF
16V
25V
0.01uF
C201
3
2 VOUT
MAX 300mA
1
GND
12mA
C206
22uF
16V
MAIN SUB MICOM
MAIN I2C PULL UP
RS232C-TRANCEIVER
CEC LEVEL SHIFT
+3.3V_MPLL
25V
0.01uF
C209
INPUT
3
2
1391mA
OUTPUT
85mA
INPUT
3
MAX 1A 1
1
R212
36
ADJ/GND
C219
100uF
16V
C220
0.01uF
25V
OUTPUT
TXCO1+
21
TXCO2-
R211
75
1%
C226
47uF
16V
IC204
MP2305DS
1420mA
+5V_ST
R202
10K
C207
22uF
16V
25V
0.01uF
C211
G
+3.3V_MPLL
R4
C1
C231
0.01uF
C216
0.01uF
25V
8
1
C235
0.1uF
SS
IN
C2
C229
10uF C8
16V
SW
C230
2
7
READY
READY
DDR2 & Vref
R5
3
6
EN
COMP
C232 READY
GND
4
5
R200
10K
TXCO2+
19
C228
0.1uF
HOTEL
2
18
TXCLKO17
TXCLKO+
AUDIO_R
3
16
15
SW_RESET
4
TXCO3-
R209
1K
14
TXCO3+
AC_DET
5
13
TXCO4-
READY
12
TXCO4+
6
11
7
SPK_R+_HOTEL
10
9
8
SPK_R-_HOTEL
8
7
9
R2
6
READY
C233
4700pF
50V
FB
R1
R245
3.6K
R246
R244 10.5K
3.9K 1%
1%
R3
5
V=0.923X(1+R1/R3)=1.266V
THE RECOMMANDED VALUE OF R3 IS 10K
ROM_RX
4
ROM_TX
3
2
L1
930mA
R201
10K
RL_ON/POWER_ON
R247
+1.8V_DDR
C6
1420mA
C214
100uF
16V
BS
C7
25V
0.01uF
C227
C236
20
1
59mA
R243
100K
22
12507WS-08L
1.899V
Q201
RTR030P02
S
D
23
TXCO1-
1/10W
1%
2
ADJ/GND
TXCO0+
P204
HOTEL OPTION
+5V_ST
VIN
24
+17V_TI
HOTEL
AP2121N-3.3TRE1
16mA
TXCO0-
IC203
1
C
B
Q200
RT1C3904-T112
+1.2V_MST
3.2A / P-CHANNEL
E
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
D1
ZD200
READY
L803
10uH
C5
C238
READY
C9
C234
22uF
16V
3225
MAIN IC CORE
C237
100uF
16V
TF05-51S
P201
FHD
OUT:1.27V
H6 R
Key / Power
2009/11/05
2
4
/ Power / LVDS / Option
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
EAX61365502(BPR)
H6 Revolution Circuit Diagram
Audio Amp
Tuner(7mm)
AVSS
Separate DGND AND AVSS
1uF
C327
R314
470
470
0.047uF
22K
R313
2200pF
C313
C319
AVSS
C321
4700pF
R315
C316
TU300
+3.3V_MST
0.047uF
AVSS
C320
4700pF
This parts are Located
on AVSS area.
R302
0
C332
TAFJ-Z001D
+3.3V_AVDD
120-ohm
+17V_TI
C333
0.1uF
C341
0.1uF
C307
100uF
25V
C326
100uF
25V
+3.3V_DVDD
+B[5V]
OUT_A
RF_AGC
4
DVSS_1
VR_DIG
LRCLK
20
SCLK
21
SDIN
22
I2S_WS
SDA
R306
22
I2S_SCK
SCL
2
3
4
5
6
1
OUT_B
45
PVDD_B_2
L308
2S AD-9060 2F
1S
1F
C369
0.1uF
C364
0.68uF
EAP61008401
50V
0.033uF
C355
0.1uF
PVDD_B_1
C370
0.1uF
C373
0.01uF
43
BST_B
42
BST_C
25
SDA
7
R322
3.3
8
R323
3.3
C374
0.01uF
PVDD_C_2
40
PVDD_C_1
39
OUT_C
38
PGND_CD_2
50V
0.033uF
C353
L307
2S AD-9060 2F
1S
PGND_CD_1
1F
C366
0.1uF
C363
0.68uF
VIDEO
GND
EAP61008401
C367
0.1uF
L301
120-ohm
SHIELD
C328
C318
1000pF
P300
2
SMAW250-H04R
3
+17V_TI
4
5
SPK_R-
1
6
1uF
7
SPK_R+
8
2
9
10
SW_RESET
SPK_L-
0.033uF
50V
C315
10uF 16V
3
11
12
C322
0.1uF
SPK_L+
C317
0.1uF
4
NC_1
PAL EU Tuner
1
NC_2
2
+B[5V]
3
RF_AGC
4
MOPLL_AS
5
SCL
6
SDA
7
NC_3
8
SIF
9
NC_4
10
VIDEO
11
GND
12
13
VREFHynix
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA1
BA0
J2
M8
M3
M7
N8
N2
N3
N7
P8
P2
P3
M2
P7
R2
L2
L3
1K
R325
VREF
A1
A2
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
M8
M3
M7
N2
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
G8
DQ0
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
NC_3
SIF
NC_4
VIDEO
GND
120-ohm C324
0.1uF
C382
0.1uF
C385
0.1uF
A1
VDD_5
L3
E1
VDD_4
CK
J8
J9
VDD_3
K8
M9
VDD_2
K2
R1
VDD_1
ODT
K9
CS
L8
A9
VDDQ_10
RAS
K7
C1
VDDQ_9
L7
C3
VDDQ_8
K3
C7
VDDQ_7
C9
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
A3
VSS_5
UDQS
A8
E3
VSS_4
J3
VSS_3
N1
VSS_2
P9
VSS_1
B2
VSSQ_10
NC_1
L1
R3
R7
A2
NC_2
E2
NC_3
R8
B8
A7
D2
D8
VSSDL
J7
E7
F2
C
MNT_LOUT
C390
6800pF
50V
R326
4.7K
E
C380
0.1uF
C383
0.1uF
C386
0.1uF
C388
0.1uF
J1
VSSQ_9
VSSQ_8
1
R328
15K R330
33pF
14
14
2
2
13
3
12
13
R334
6.8K
R332
5.6K
C394
EU
3
4
MNT_R_AMP
5.6K
R333
5
4
11
5
10
12
R344
11 6.8K
10
EU
B
EU
33pF
C392
MNT_L_AMP
1K
R350
R348 EU 10K
1/16W
5%
+17V_AMP
C389
0.1uF
1
TV_L_AMP
R346
5.6K
EU
C397
6800pF
50V
EU R352
4.7K
EU
E
Q305
2SC3875S(ALY)
EU
TV_LOUT
TV_R_AMP
R347
5.6K
EU
+17V_AMP
C381
0.1uF
C384
0.1uF
C387
0.1uF
C
Q303
2SC3875S(ALY)
MNT_ROUT
B
E
1K
R329
R335
6
6.8K
C393
33pF
1/16W
7
5% 15K R331
6
7
9
8
9
+17V_AMP
R345
EU
C396
8
6.8K
EU
C
33pF
R349 EU
10K
B
R351 EU 1K
C391
6800pF
50V
R327
4.7K
C398
6800pF
50V
EU R353
4.7K
E
Q306
2SC3875S(ALY)
EU
TV_ROUT
EU
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
F8
VSSQ_3
H2
VSSQ_2
H8
VSSQ_1
AMP :GAIN X 4
DDR2_D[0]
DDR2_D[1]
DDR2_D[2]
DDR2_D[3]
DDR2_D[4]
DDR2_D[5]
DDR2_D[6]
DDR2_D[7]
DDR2_D[8]
DDR2_D[9]
DDR2_D[10]
DDR2_D[11]
DDR2_D[12]
DDR2_D[13]
DDR2_D[14]
VDDL
DDR2_D[15]
+17V_AMP
1K
B
L2
BA1
WE
DQ12
DQ13
DQ14
DQ15
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VSS5
VSS4
VSS3
VSS2
VSS1
VSSQ10
J2
A3
A4
CAS
D1
D9
B1
B9
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A3
E3
J3
N1
P9
B2
A7
B8
VSSQ9
VSSQ8
SDA
+17V_AMP
Samsung
NC_6
VSSQ7
+17V_TI
DDR2_A[0]
DDR2_A[1]
DDR2_A[2]
DDR2_A[3]
DDR2_A[4]
DDR2_A[5]
DDR2_A[6]
DDR2_A[7]
DDR2_A[8]
DDR2_A[9]
DDR2_A[10]
DDR2_A[11]
DDR2_A[12]
READY
R342
J8
K8
K2
K9
L8
K3
K7
L7
F7
B7
F3
B3
A8
E8
R7
L1
R3
A2
E2
J7
R8
D2
F2
D8
E7
SCL
IC303-*1
K4T51163QG-HCE7
NC_5
VSSQ4
C
MOPLL_AS
SHIELD
+1.8V_DDR
NC_4
VSSQ6
V_REF
Close to DDR2 IC
BA0
H5PS5162FFR-S6C
VSSQ5
Q304
ISA1530AC1
EU
B
EU
C
V_REF
CK
CK
CKE
ODT
CS
RAS
WE
CAS
56
R336
56
R337
LDQS
UDQS
56
56
R339
R338
LDM
UDM
56
R340
56
R341
UDQS
LDQS
NC6
NC4
NC5
NC3
NC2
NC1
VSSDL
VDDL
J1
RF_AGC
13
Q302
2SC3875S(ALY)
CK
F8
E
R343
0
+B[5V]
IC302
LM324D
CKE
H8
NC_2
+17V_AMP
IC303
H2
TV_VOUT
NC_1
Gaim Amp for MNT out
1K
R324
DDR2_BA1
DDR2_BA0
DDR2_ODT
DDR2_CKE
DDR2_MCLKZ
DDR2_MCLK
DDR2_WEZ
DDR2_CASZ
DDR2_RASZ
DDR2_DQS1P
DDR2_DQS0P
DDR2_DQM1
DDR2_DQM0
DDR2_DQS1M
DDR2_DQS0M
DDR2_A[0-12]
A0
VSSQ3
ISA1530AC1
L302
+1.8V_DDR
VSSQ1
C
TAFJ-H001F
SHIELD
+1.8V_DDR
VSSQ2
Q301
TU300-*2
DDR Memory for Main IC
C395
0.1uF
16V
C323
READY
E
B
TU300-*1
OUT_D
PVDD_D_2
PVDD_D_1
BST_D
GVDD_OUT_2
VREG
GND
AGND
DVDD
DVSS_2
RESET
STEST
C337
0.1uF
R354
180
EU
TV_MAIN
R319
270
R321
3.3
C372
0.01uF
1
C303 C325
C340 100uF 100uF
25V
0.1uF 25V
R318
270
C314
0.1uF
50V
TAFJ-S001D
C331
MAIN_SIF
R303
READY
R301
4.7K
R320
3.3
A_SDA
+3.3V_DVDD
IF_AGC_SEL
EU
Q300
2SC3875S(ALY)
EU
E
R310
0
R317
10K
B
C308
27pF
13
SPK_R+
C371
0.01uF
SPK_RA_SCL
C
S_SDA
NC_4
10
SPK_L-
C305
27pF
SIF
9
S_SCL
R311
330
NC_3
11
41
37
24
I2S_SDO
6
C312
4.7uF
35V
EU
R312
330
+5V_TU
23
R307
22
46
+17V_TI
EU
36
R305
22
PGND_AB_1
R316
100
EU
SCL
12
35
C302
0.1uF
C301
1000pF
50V
19
34
C306
4.7uF
10V
33
1K
TAS5709PHPR
IC300
18
PDN
32
R300
PGND_AB_2
47
C359
31
AC_DET
48
44
17
30
1%
16
29
18K
R309
7
15
OSC_RES
28
R308
200
R304
22
8
9
MCLK
AVSS
10
14
27
I2S_MCLK
13
26
C304
0.1uF
C300
10uF 16V
11
12
AVDD
TESTOUT
L300
BLM18BD102SN1D
MOPLL_AS
5
SPK_L+
C309
0.1uF
NC_2
2
3
PVDD_A_1
PVDD_A_2
BST_A
GVDD_OUT_1
SSTIMER
NC
OC_ADJ
AVSS
PLL_FLTM
VR_ANA
PLL_FLTP
NC_1
1
L309
120-ohm
+3.3V_AVDD
+5V_TU
L310
0.033uF
50V
DDR2_D[0-15]
+1.8V_DDR
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
H6 R
Tuner/Amp/DDR
2009/11/05
3
4
Tuner / Amp / DDR
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+3.3V_MST
+3.3V_MST
V_REF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
AVDD_MEMPLL
MVREF
A_ODT
A_RASZ
A_CASZ
A_MADR[0]
A_MADR[2]
A_MADR[4]
GND_15
A_MADR[6]
A_MADR[8]
A_MADR[11]
A_WEZ
A_BADR[1]
A_BADR[0]
A_MADR[1]
A_MADR[10]
AVDD_DDR_6
A_MADR[5]
A_MADR[9]
A_MADR[12]
A_MADR[7]
A_MADR[3]
A_MCLKE
VDDC_6
I2S_IN_WS/GPIO67
I2S_IN_BCK/GPIO68
I2S_IN_SD
I2S_OUT_MCK
I2S_OUT_WS
VDDP_5
GND_16
VDDC_7
I2S_OUT_BCK
I2S_OUT_SD
SPDIFO
UART2_RX/I2CM_SDA
UART2_TX/I2CM_SCK
UART1_RX/GPIO86
UART1_TX/GPIO87
GND_17
GND_18
USB0_DM
USB0_DP
SAR0
SAR1
SAR2
SAR3
AVDD_MPLL
GND_14
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
128
127
LVA0M
VDDP_2
125
126
124
LVA1P
LVA1M
LVA0P
123
122
LVA2P
LVA2M
119
121
120
LVACKP
LVACKM
118
117
LVA4M
LVA3P
LVA3M
114
116
115
PWM3
LVA4P
113
112
PWM0
PWM1
PWM2
111
110
SDO
SCZ
107
109
108
SCK
SDI
USB1_DP
105
106
USB1_DM
HOTPLUGC
102
104
103
RXC2N
RXC2P
101
100
RXC1N
RXC1P
AVDD_DM
97
99
98
RXC0P
GND_6
95
96
RXC0N
RXCCKP
DDCDC_DA
93
94
RXCCKN
DDCDC_CK
91
92
90
VDDC_3
UART2_RX
88
89
85
86
87
83
84
193
194
GND_14
AVDD_MEMPLL
A_ODT
MVREF
195
196
A_CASZ
A_RASZ
197
198
A_MADR[2]
A_MADR[4]
A_MADR[0]
199
200
201
A_MADR[6]
GND_15
202
203
A_MADR[11]
A_WEZ
A_MADR[8]
204
205
206
A_BADR[0]
A_BADR[1]
207
208
A_MADR[10]
A_MADR[1]
209
210
211
AVDD_DDR_6
A_MADR[9]
A_MADR[5]
212
213
A_MADR[7]
A_MADR[12]
214
215
216
A_MADR[3]
VDDC_6
A_MCLKE
217
218
I2S_IN_BCK/GPIO68
I2S_IN_WS/GPIO67
219
220
I2S_OUT_MCK
I2S_OUT_WS
I2S_IN_SD
221
222
223
GND_16
VDDP_5
224
225
I2S_OUT_BCK
VDDC_7
226
227
228
I2S_OUT_SD
UART2_RX/I2CM_SDA
SPDIFO
229
230
UART1_RX/GPIO86
UART2_TX/I2CM_SCK
231
232
233
UART1_TX/GPIO87
GND_18
GND_17
234
235
USB0_DP
USB0_DM
236
237
SAR0
SAR1
SAR2
AVDD_DDR_4
179
B_DDR2_DQSB[1]
178
B_DDR2_DQS[1]
RXA1N
16
177
GND_12
RXA1P
17
176
VDDP_4
18
175
AVDD_DDR_3
RXA2N
19
174
B_DDR2_DQSB[0]
RXA2P
20
173
B_DDR2_DQS[0]
HOTPLUGA
21
172
GND_11
REXT
22
171
B_DDR2_DQM[0]
VCLAMP
23
170
B_DDR2_DQM[1]
REFP
24
169
AVDD_DDR_2
25
168
B_MDATA[14]
BIN1P
26
167
B_MDATA[9]
SOGIN1
27
166
GND_10
GIN1P
28
165
B_MDATA[12]
RIN1P
29
164
B_MDATA[11]
30
163
AVDD_DDR_1
162
B_MDATA[6]
161
B_MDATA[1]
160
GND_9
159
B_MDATA[3]
158
B_MDATA[4]
BIN0P
31
GINM
32
GIN0P
33
SOGIN0
34
IC403-*2
35
RIN0P
36
157
VDDC_5
AVDD_33_3
37
156
VDDP_3
GND_2
38
155
GPIO58
BIN2P
39
154
GPIO57
GIN2P
40
153
GPIO56
SOGIN2
41
152
GPIO55
RIN2P
42
151
GPIO54
CVBS6
43
150
GPIO53
CVBS5
44
149
GPIO52
CVBS4
45
148
GPIO51
CVBS3
46
147
GND_8
CVBS2
47
146
GPIO152/I2C_OUT_SD3
CVBS1
48
145
GPIO151/I2C_OUT_SD2
VCOM1
49
144
GPIO150/I2C_OUT_MUTE
CVBS0
50
143
VDDC_4
VCOM0
51
142
GND_7
AVDD_33_4
52
141
AVDD_LPLL
CVBSOUT
53
140
LVB0M
GND_3
54
139
LVB0P
SIF0P
55
138
LVB1M
SIF0M
56
137
LVB1P
57
136
LVB2M
AUL5
58
135
LVB2P
AUR5
59
134
LVBCKM
AUVRM
60
133
LVBCKP
AUOUTL2
61
132
LVB3M
127
VDDP_2
128
126
125
LVA1M
LVA0P
LVA0M
124
123
LVA2M
LVA1P
120
121
122
LVA2P
LVACKP
LVACKM
119
118
LVA3P
LVA3M
116
117
115
PWM3
LVA4P
LVA4M
114
113
PWM1
PWM2
110
112
111
SCZ
PWM0
109
108
SCK
SDI
SDO
105
107
106
USB1_DM
USB1_DP
104
103
RXC2N
RXC2P
HOTPLUGC
102
101
RXC1P
AVDD_DM
99
100
98
RXC0P
GND_6
RXC1N
96
97
RXC0N
DDCDC_DA
93
95
94
RXCCKN
RXCCKP
92
91
UART2_RX
UART2_TX
DDCDC_CK
88
90
86
89
VDDP_1
VDDC_3
GPIO20
DDCDB_CK
DDCDB_DA
DDCDA_CK
DDCDA_DA
AUL0
87
LVB4P
84
129
85
LVB4M
64
81
LVB3P
130
82
131
83
62
63
65
AUOUTR2
AUOUTL1
AUOUTR1
LGE4765A (Matrix basic_NON_SRS)
AVDD_MEMPLL
GND_14
193
194
A_ODT
MVREF
195
196
A_CASZ
A_MADR[0]
A_RASZ
197
198
199
A_MADR[4]
A_MADR[2]
200
201
A_MADR[6]
A_MADR[8]
GND_15
202
203
204
A_WEZ
A_MADR[11]
205
206
A_BADR[0]
A_BADR[1]
207
208
209
A_MADR[1]
AVDD_DDR_6
A_MADR[10]
210
211
A_MADR[9]
A_MADR[5]
212
213
214
A_MADR[12]
A_MADR[3]
A_MADR[7]
215
216
VDDC_6
A_MCLKE
217
218
I2S_IN_BCK/GPIO68
I2S_IN_SD
I2S_IN_WS/GPIO67
219
220
221
I2S_OUT_WS
I2S_OUT_MCK
222
223
GND_16
VDDP_5
224
225
226
VDDC_7
I2S_OUT_SD
I2S_OUT_BCK
227
228
UART2_RX/I2CM_SDA
SPDIFO
229
230
231
UART2_TX/I2CM_SCK
UART1_TX/GPIO87
UART1_RX/GPIO86
232
233
GND_18
GND_17
234
235
USB0_DP
SAR0
USB0_DM
236
237
238
SAR2
SAR1
239
240
AVDD_MPLL
SAR3
241
242
243
XOUT
GPIO134
XIN
244
245
GPIO138
GPIO135
246
247
248
GPIO139
IRIN
GPIO140
249
250
HSYNC0
VSYNC0
B_MDATA[13]
184
B_MDATA[10]
10
183
GND_13
RXACKN
11
182
B_MDATA[8]
RXACKP
12
181
B_MDATA[15]
RXA0N
13
180
AVDD_DDR_4
RXA0P
14
179
B_DDR2_DQSB[1]
AVDD_33_2
15
178
B_DDR2_DQS[1]
RXA1N
16
177
GND_12
17
176
VDDP_4
GND_1
18
175
AVDD_DDR_3
RXA2N
19
174
B_DDR2_DQSB[0]
RXA2P
20
173
B_DDR2_DQS[0]
HOTPLUGA
21
172
GND_11
22
171
B_DDR2_DQM[0]
VCLAMP
23
170
B_DDR2_DQM[1]
REFP
24
169
AVDD_DDR_2
REFM
25
168
B_MDATA[14]
BIN1P
26
167
B_MDATA[9]
27
166
GND_10
GIN1P
28
165
B_MDATA[12]
RIN1P
29
164
B_MDATA[11]
BINM
30
163
AVDD_DDR_1
BIN0P
31
162
B_MDATA[6]
161
B_MDATA[1]
160
GND_9
159
B_MDATA[3]
158
B_MDATA[4]
157
VDDC_5
GINM
32
GIN0P
33
IC403-*3
34
RINM
35
RIN0P
36
AVDD_33_3
37
156
VDDP_3
GND_2
38
155
GPIO58
39
154
GPIO57
GIN2P
40
153
GPIO56
SOGIN2
41
152
GPIO55
RIN2P
42
151
GPIO54
CVBS6
43
150
GPIO53
44
149
GPIO52
CVBS4
45
148
GPIO51
CVBS3
46
147
GND_8
CVBS2
47
146
GPIO152/I2C_OUT_SD3
CVBS1
48
145
GPIO151/I2C_OUT_SD2
VCOM1
49
144
GPIO150/I2C_OUT_MUTE
CVBS0
50
143
VDDC_4
VCOM0
51
142
GND_7
AVDD_33_4
52
141
AVDD_LPLL
CVBSOUT
53
140
LVB0M
GND_3
54
139
LVB0P
SIF0P
55
138
LVB1M
SIF0M
56
137
LVB1P
VDDC_1
57
136
LVB2M
AUL5
58
135
LVB2P
AUR5
59
134
LVBCKM
AUVRM
60
133
LVBCKP
AUOUTL2
128
127
LVA0M
VDDP_2
126
125
LVA1M
LVA0P
123
124
122
LVA2P
LVA2M
LVA1P
121
120
LVACKP
LVACKM
118
119
117
LVA4M
LVA3P
LVA3M
116
115
PWM3
LVA4P
112
114
113
PWM1
PWM2
111
110
SDO
SCZ
PWM0
107
109
108
SCK
SDI
105
106
USB1_DM
USB1_DP
HOTPLUGC
104
103
RXC2N
RXC2P
101
102
100
RXC1N
RXC1P
AVDD_DM
99
98
RXC0P
GND_6
95
96
97
RXC0N
DDCDC_DA
93
94
RXCCKN
RXCCKP
DDCDC_CK
90
92
91
UART2_RX
UART2_TX
89
88
GPIO20
VDDP_1
VDDC_3
87
86
DDCDB_CK
DDCDB_DA
84
85
83
DDCA_DA
DDCDA_CK
DDCDA_DA
82
81
VDDC_2
DDCA_CK
78
79
80
GND_5
AVDD_AU
77
76
GND_4
AUVRP
AUVAG
73
74
AUL4
AUR4
AUL3
AUR3
AUCOM
75
LVB4P
71
129
72
64
69
LVB4M
AUOUTR1
70
LVB3P
130
66
LVB3M
131
67
132
62
63
68
61
AUOUTR2
AUOUTL1
65
FLASH
HSYNC1
AVDD_DDR_5
185
BIN2P
R476
READY
1K
VSYNC1
B_MDATA[7]
186
AUL0
1K
ROM D/L HDMI_3
RX,TX
CEC
HWRESET
B_MDATA[0]
187
SOGIN0
1K
251
B_MDATA[2]
188
RXA1P
R475
252
B_MDATA[5]
189
8
9
REXT
R473
READY
1K
253
B_MCLK
190
5
6
7
RXB2N
AUL2
HD LVDS
254
B_MCLKZ
191
3
4
1
RXB1N
RXB1P
AVDD_33_1
RXB2P
+3.3V_MST
255
192
2
RXB0N
RXB0P
RXBCKN
RXBCKP
HOTPLUGB
[MODE SELECTION]
256
MATRIX_SD DIVX_RM
BUZZ_PWM
MOVING
LED
C405
0.1uF
16V
238
180
14
15
CVBS5
SYS_RESET
USB PART
T2
R405
33K
239
B_MDATA[15]
13
RXA0P
AVDD_33_2
VDDC_1
R474
D401
KDS181
240
B_MDATA[8]
181
AUR2
LED_W
LED_BL
HPD_MST_3
USB_DN
USB_DP
SPI_CLK
SPI_DI
SPI_DO
SPI_CZ
TMDS3_RX1TMDS3_RX1+
TMDS3_RX2TMDS3_RX2+
TMDS3_RXCTMDS3_RXC+
TMDS3_RX0TMDS3_RX0+
FLASH_WP
ROM_RX
ROM_TX
0.1uF 1000pF 4.7uF
Close to IC
with width trace
R410
22
80
182
GND_1
C443
DSUB_SCL
DSUB_SDA
DDC_SCL1
DDC_SDA1
DDC_SCL2
DDC_SDA2
DDC_SCL3
DDC_SDA3
C403
4.7uF
10V
C438
PC_AUD_L
PC_AUD_R
+3.3V_MPLL
C415
SC1_LIN
SC1_RIN
COMP1_L
COMP1_R
COMP2_L
COMP2_R
SC2_LIN
SC2_RIN
C401
0.1uF
81
11
12
RXA0N
SOGIN1
10uF
82
GND_13
RXACKN
RXACKP
RINM
+3.3V_MST
C458
0.01uF
25V
100
R490
0.1uF
100
R462
1/16W
R453
C439
22
C453
0.01uF
25V
EU EU
AR407
GAIN X 4
C412
SAR3
B_MDATA[10]
183
VDDC_2
TXCO0-
AVDD_MPLL
B_MDATA[13]
184
DDCA_CK
129
LVB4P
241
AVDD_DDR_5
185
DDCA_DA
TXCO0+
242
B_MDATA[7]
186
79
LVB4M
78
B_MDATA[0]
187
80
130
79
B_MDATA[2]
188
8
9
10
GND_5
LVB3P
XOUT
B_MDATA[5]
189
6
7
REFM
TXCO2-
XIN
190
4
5
RXB2N
RXB2P
AVDD_AU
4.7K
1
RXB1N
RXB1P
76
4.7K
+3.3V_MST
243
B_MCLK
RXB0N
77
P_SDA
244
B_MCLKZ
191
RXBCKP
78
R463
TXCO2+
TXCO1-
75
192
2
3
RXB0P
HOTPLUGB
AVDD_33_1
AUVRP
R447
P_SCL
128
127
LVA0M
TXCE4+
126
LVA0P
TXCE4-
R403
245
+3.3V_MST
GPIO134
4.7K
TXCLKO-
132
76
LVB4P
77
LVB4M
129
73
LVB3P
130
74
131
63
64
GPIO135
4.7K
R477
M5V_ON
TXCLKO+
TXCO1+
XOUT
LVB3M
62
AUOUTL1
AUOUTR1
GPIO138
EYE_SCL
EYE_SDA
IF_AGC_SEL
A_SCL
A_SDA R478
TXCO3-
LVB3M
234
LVBCKP
132
246
R469
TXCO3+
LVBCKP
235
133
ERROR_DET
R466
R487
133
236
60
61
DDR2_D[3]
R468
VDDP_2
TXCE3+
125
LVA1M
124
LVA1P
TXCE3-
123
LVA2M
TXCLKE+
122
LVA2P
TXCLKE-
121
LVACKM
TXCE2+
120
LVACKP
TXCE2-
119
LVA3M
TXCE1+
118
LVA3P
TXCE1-
117
116
115
LVA4M
TXCE0+
PWM3
LVA4P
TXCE0-
114
PWM2
113
PWM1
112
111
SCZ
PWM0
110
SDO
109
SDI
108
SCK
107
USB1_DP
106
105
104
103
RXC2P
USB1_DM
HOTPLUGC
102
100
101
10
AR405
RXC2N
RXC1P
AVDD_DM
1/16W
RXC1N
99
GND_6
98
97
96
RXC0N
RXC0P
DDCDC_DA
AR404
95
5V
5V
64
LVBCKM
XIN
LVBCKM
AUVRM
AUOUTL2
AUOUTR2
C416
R435
EU EU EU EU
MStar Reset
135
LVB2P
GPIO134
LVB2P
134
AUVAG
3.3V
AUL0
22K
0.01uF
22K
C475
0.01uF
0.01uF
R486
C414
22K
C474
R414
22K
0.01uF
R485
63
94
EU
LVB2M
131
93
100 AUOUTR1
100
62
RXCCKP
R484
EU
61
RXCCKN
R483
60
LVB1P
237
135
BINM
136
134
DDCDC_CK
100 AUOUTL1
R437
59
1/16W
10
100 AUOUTR2
R438
58
92
AUVRM
57
137
91
2.2uF
56
UART2_TX
AUR5
LVB1M
UART2_RX
2.2uF
138
90
C417
C418
55
VDDC_3
AUL5
LVB0P
89
VDDC_1
139
VDDP_1
C420
SIF0M
54
TXCO4-
53
88
47
0.1uF
0.1uF
TXCO4+
GPIO20
C419
140
LVB0M
87
47
AVDD_LPLL
DDCDB_DA
R413
141
86
SIF0P
52
DDCDB_CK
GND_3
GND_7
85
0.01uF
142
84
C413
51
83
0.047uF VCOM0
AVDD_33_4
143
50
DDCA_DA
C437
47
CVBS0
DDCDA_DA
0.047uF
DDCDA_CK
C436
GPIO150/I2C_OUT_MUTE 22
22
VDDC_4
79
47
144
49
78
R428
VCOM1
AUVAG
47
AVDD_AU
R429
GPIO151/I2C_OUT_SD2
238
58
59
MATRIX BASIC
145
SCART_CVBS
48
GPIO135
LVB2M
AUL5
AUR5
RXBCKN
CVBS1
EU
C435
0.047uF
100
GPIO138
LVB1P
136
247
146
GPIO152/I2C_OUT_SD3
LVB1M
137
74
GND_8
138
56
57
75
GPIO51
147
GPIO139
LVB0P
55
SIF0M
VDDC_1
AUL4
148
46
CVBS2
239
LVB0M
139
AUR4
45
CVBS3
0.047uF
240
140
54
GND_4
CVBS4
0.047uF
C473
241
53
GND_3
GPIO139
0.047uF
C434
GPIO140
AVDD_LPLL
CVBSOUT
GPIO140
C433
47
47
IRIN
GND_7
141
UART2_TX
R467 22
47
R423
242
VDDC_4
142
LGE4766A (Matrix Only MP3_NON SRS)
GPIO55
R482
243
143
51
52
GPIO20
R470 22
HSYNC0
GPIO150/I2C_OUT_MUTE
50
VCOM0
AVDD_33_4
VDDP_1
GPIO52
VSYNC0
GPIO151/I2C_OUT_SD2
144
DDCDA_DA
GPIO53
149
HSYNC1
145
DDCDB_CK
150
244
48
49
DISP_EN
R464
100
READY R465
100
100
245
GPIO152/I2C_OUT_SD3
CVBS1
VCOM1
DDCDB_DA
GPIO54
VSYNC1
GND_8
146
DDCA_DA
GPIO56
151
47
CEC
GPIO51
147
DDCDA_CK
3.3V 153
5V 152
246
148
46
47
DDR2_D[4]
100
GPIO57
247
GPIO52
45
CVBS3
CVBS2
VDDC_2
GPIO58
248
HWRESET
GPIO53
149
DDCA_CK
3.3V155
5V 154
249
150
AUVAG
38
R422
43
44
GND_5
GND_2
3.3V
GPIO54
CVBS6
CVBS5
AVDD_AU
VDDP_3
S-VIDEO
GPIO55
151
GND_4
VDDC_5
156
44
152
42
AUVRP
B_MDATA[4]
157
37
43
41
RIN2P
AUL4
158
36
C459
0.01uF
25V
35
CVBS5
GPIO56
SOGIN2
DDR2_D[1]
56
RINM
PCM
GPIO57
153
AUR4
AR413
0.047uF RIN0P
AVDD_33_3
42
GPIO58
154
248
GND_9
0.047uF
41
155
39
40
249
160
C429
40
38
BIN2P
GIN2P
DDR2_D[12]
DDR2_D[6]
C428
0.047uF GIN2P
1000pF SOGIN2
0.047uF RIN2P
CVBS6
VDDP_3
IC403-*1
250
B_MDATA[1]
47
47 C432
VDDC_5
156
36
37
71
161
47
47 C431
B_MDATA[4]
157
RIN0P
AVDD_33_3
SIF0P
R421
470C442
B_MDATA[3]
158
CVBS4
DDR2_D[11]
R420
R434
GND_9
159
35
72
162
B_MDATA[6]
159
R433
B_MDATA[1]
160
33
34
RINM
73
AVDD_DDR_1
34
R432
B_MDATA[6]
161
GIN0P
DDR2_D[9]
56
1000pF
39
162
32
AUCOM
AR412
C441
BIN2P
31
GINM
SOGIN0
DDR2_D[14]
470
0.047uF
AVDD_DDR_1
BIN0P
AUR3
163
B_MDATA[3]
47 C430
B_MDATA[11]
163
GND_2
R419
R431
B_MDATA[12]
164
30
CVBS0
SOGIN0
R481 EU 0
GND_10
165
29
BINM
71
DDR2_DQM0
DDR2_DQM1
28
RIN1P
72
33
B_MDATA[9]
166
68
32
167
69
31
26
27
GIN1P
65
30
B_MDATA[14]
BIN1P
SOGIN1
70
B_MDATA[11]
AVDD_DDR_2
168
66
164
29
B_DDR2_DQM[1]
169
67
B_MDATA[12]
170
24
25
AUL3
AVDD_MEMPLL
MVREF
SCART H\V SYNC
165
scart RGB INPUT
28
B_DDR2_DQM[0]
23
REFP
REFM
AUR3
GIN0P
0.047uF
GND_10
LGE4767A (Matrix SD Divx_ Non RM_NON SRS)
27
GND_11
171
AUR1
C427
47
166
26
172
22
AUR0
R418
167
B_MDATA[9]
21
REXT
VCLAMP
AUL2
GINM
B_MDATA[14]
B_DDR2_DQS[0]
HOTPLUGA
AUR2
0.047uF
168
B_DDR2_DQSB[0]
173
AUR0
C426
25
174
AUL1
47
AVDD_DDR_2
19
20
AUL0
R417
169
AVDD_DDR_3
RXA2N
RXA2P
IRIN
BIN0P
24
23
VDDP_4
175
HSYNC0
0.047uF
170
B_DDR2_DQM[1]
GND_12
176
VSYNC0
C425
B_DDR2_DQM[0]
177
17
18
HSYNC1
47
171
22
250
B_DDR2_DQS[1]
16
RXA1P
GND_1
VSYNC1
R416
GND_11
251
B_DDR2_DQSB[1]
178
CEC
BINM
0.047uF
172
DDR2_DQS0M
DDR2_DQS0P
252
179
HWRESET
C424
47
173
B_DDR2_DQS[0]
253
14
15
251
RIN1P
B_DDR2_DQSB[0]
254
AVDD_DDR_4
RXA0P
AVDD_33_2
RXA1N
174
255
B_MDATA[15]
180
252
0.047uF
175
AVDD_DDR_3
256
B_MDATA[8]
181
13
253
193
194
195
196
A_ODT
A_RASZ
197
A_CASZ
198
A_MADR[0]
A_MADR[4]
A_MADR[2]
200
201
GND_15
202
A_MADR[8]
A_MADR[11]
A_WEZ
A_MADR[6]
203
204
205
206
A_BADR[1]
207
A_BADR[0]
208
A_MADR[10]
A_MADR[1]
209
210
AVDD_DDR_6
211
A_MADR[5]
212
A_MADR[9]
213
A_MADR[12]
214
GND_14
182
12
RXA0N
AUCOM
DDR2_A[0]
AR411
56
DDR2_A[2]
DDR2_A[4]
DDR2_A[6]
DDR2_A[8]
AR410
56
AR408
56
AR409
56
DDR2_A[11]
DDR2_A[1]
DDR2_BA0
DDR2_BA1
DDR2_WEZ
DDR2_A[10]
DDR2_A[5]
DDR2_A[9]
DDR2_A[7]
DDR2_A[3]
AR406
56
56
R461
A_MADR[3]
A_MCLKE
A_MADR[7]
215
216
217
I2S_IN_BCK/GPIO68
VDDC_6
218
219
I2S_IN_WS/GPIO67 R459
22
100 R460
DDR2_CKE
I2S_WS
I2S_MCLK
S_SDA R456
R458
S_SCL
SW_RESET
220
1K
22
R457
I2S_OUT_MCK
I2S_OUT_WS
VDDP_5
GND_16
I2S_IN_SD
221
222
223
224
225
I2S_OUT_BCK
I2S_OUT_SD
VDDC_7
226
228
227
22
R454
SPDIFO
229
230
1/10W
UART2_RX/I2CM_SDA
R455
TXD
RXD
R450
M_SCL
R452
M_SDA
MUTE_LINE
I2S_SDO
I2S_SCK
231
R448 100
UART1_RX/GPIO86 R451
5% R449 100
1/10W
UART2_TX/I2CM_SCK
5%22
GND_17
GND_18
USB0_DM
USB0_DP
SAR0
UART1_TX/GPIO87
233
234
235
236
237
238
232
KEY2
KEY1
AC_DET
SC2_ID
R443
R445
100
C452
SAR1
SAR2
XOUT
AVDD_MPLL
242
243
XIN
244
245
GPIO134
GPIO138
GPIO139
GPIO140
IRIN
HSYNC0
VSYNC0
GPIO135
246
247
248
249
250
251
252
253
HSYNC1
VSYNC1
DDR2_CASZ
DDR2_RASZ
DDR2_ODT
GND_13
11
RXACKP
254
C423
VDDP_4
255
47
IC403
21
100
75
R407
EU
B_MDATA[10]
183
256
R426
20
176
FHD LVDS
C478
10uF
EU
184
69
GIN1P
19
SCART_AUDIO out
EU
15K
R489
EU
B_MDATA[13]
9
10
70
0.047uF
18
MNT_VOUT_T
Q401
EU
AVDD_DDR_5
RXB2N
RXB2P
67
C422
MNT_L_AMP
MNT_R_AMP
TV_L_AMP
TV_R_AMP
220
R404 E
B_MDATA[7]
185
68
47
+5V_MULTI
MNT_VOUT
B_MDATA[0]
186
66
SOGIN1
1000pF
AUOUTL2
B
B_MDATA[2]
187
AUL2
C440
470
R415
R480 EU 0
0.047uF
R425
SIDE_LIN
SIDE_RIN
C
GND_12
188
6
7
8
AUL1
R427
R479 EU 0
C421
47
BIN1P
M_SDA
R488
30K
EU
B_MDATA[5]
189
1
RXB1P
RXB1N
AUR2
VCLAMP
390
MNT_VOUT_T
C
B_MCLK
190
RXB0N
AUR1
R424
PC_B
PC_G
R412
Q400 E
EU
B_MCLKZ
191
4
5
RXBCKP
AUL3
R436
0.1uF
CVBSOUT
R406
470
EU
192
2
3
RXB0P
HOTPLUGB
AVDD_33_1
AUL1
REXT
M_SCL
+5V_MULTI
MATRIX_ONLY MP3
DDR2_DQS1M
DDR2_DQS1P
AUR1
HOTPLUGA
R430
Vout Amp
DDR2_D[15]
AUR0
RXA2N
RXA2P
MAIN_SIF
B
100
R446
0.1uF
100
10
AR403
17
77
SDA
5
DDR2_D[8]
56
RXACKN
76
4
177
16
AUVRP
VSS
DDR2_D[10]
AR415
RXBCKN
TV_MAIN
R409
100
CEC
B_DDR2_DQS[1]
C402
0.1uF
SCL
6
255
178
GND_4
3
DDR2_D[13]
15
EU
R408
100
B_MDATA[10]
AVDD_33_2
75
A2
7
184
DDR2_D[0]
DDR2_D[7]
B_DDR2_DQSB[1]
AUR4
2
WP
B_MDATA[13]
179
74
A1
8
185
14
73
1
AVDD_DDR_5
RXA0P
SC1_VIN
SIDE_VIN
SC2_VIN
VCC
186
AR402
GND_1
C471
0.1uF
C469
0.1uF
C467
0.1uF
DDR2_D[2]
56
AVDD_DDR_4
RXA1P
C465
0.1uF
DDR2_D[0-15]
DDR2_MCLKZ
DDR2_MCLK DDR2_D[5]
AR414
180
COMP2_PR
IC401
CAT24WC08W-T
B_MDATA[7]
13
COMP2_PB
COMP2_Y
+3.3V_MST
B_MDATA[0]
187
RXA0N
REFM
COMP1_PR
SC1_R
B_MDATA[2]
188
B_MDATA[15]
REFP
PC_R
SC1_B
COMP1_PB
189
181
AUL4
M_SDA
22
12
2.2uF C450
2.2uF C451
SDA
22
R472
RXACKP
AUCOM
Close to IC as close as
possible with width trace
R471
B_MDATA[5]
1/16W
10
2.2uF C477
M_SCL
B_MCLK
190
B_MDATA[8]
0.1uF
0.1uF
0.1uF
B_MCLKZ
191
GND_13
72
C408
192
182
1/16W
C463
0.1uF
Close to IC as close as possible
183
AUR3
SCL
C461
0.1uF
SCART_AUDIO IN
C406
+1.2V_MST
11
71
WP
+1.8V_DDR
25V
0.01uF
C457
10
RXA1N
C470 C472
C466 C468
0.01uF0.01uF 0.01uF0.01uF
25V
25V
25V
25V
+1.8V_DDR
3.3V
5V
5V
C462
C464
0.01uF 0.01uF
25V
25V
C460
0.01uF
25V
RXB2P
C410
HDCP EEPROM
A0
9
25V
0.01uF
C456
Close to IC as close as possible
RXACKN
HPD_MST_1
C404
0.01uF
25V
COMP1_Y
SC1_G
R400
4.7K
RXB2N
AR401
70
5
8
69
4
AVDD_33_1
AUL3
6
7
AUR2
GND
3
RXB1P
VCC
C407
A2
6
AUL2
7
5
2.2uF C449
2.2uF C476
2
4
RXB1N
3.3V
5V
2.2uF C448
8
RXB0P
HOTPLUGB
1/16W
10
3
2.2uF C447
A1
1
TMDS1_RX1TMDS1_RX1+
TMDS1_RX2TMDS1_RX2+
AR400
RXB0N
68
A0
+3.3V_MST
TMDS1_RXCTMDS1_RXC+
TMDS1_RX0TMDS1_RX0+
RXBCKNRM/SRS
SD Divx_NON
1
RXBCKP
2
1/16W
10
AUR1
IC400
AT24C64CN-SH-T
HDMI_1
Main EEPROM
TMDS2_RXCTMDS2_RXC+
TMDS2_RX0TMDS2_RX0+
HPD_MST_2
TMDS2_RX1TMDS2_RX1+
TMDS2_RX2TMDS2_RX2+
254
HWRESET
FLASH_WP
2.2uF C446
WP
256
9
R411
4.7K
67
8
+3.3V_MST
GND
66
10
65
DO
11
7
AUL1
SPI_DO
6
AUR0
CS
NC_5
2.2uF C445
R401
4.7K
SPI_CZ
NC_6
SAR3
12
239
5
2.2uF C444
NC_4
HDMI_2
NC_3
+3.3V_MST
NC_7
240
13
241
4
NC_8
+3.3V_MST
NC_2
82
14
SPI_DI
81
3
DIO
80
15
GND_5
2
C411
0.1uF
C409
10uF
SPI_CLK
VDDC_2
NC_1
16
DDCA_CK
VCC
1
100 R442
C400
0.01uF
25V
+3.3V_MST
CLK
100 R440
100 R441
HOLD
100 R439
+3.3V_MST
CEC_C
PC_VS
PC_HS
SC1_FB
SC1_ID
IR
ISP_RX
RXD
RL_ON/POWER_ON
TXD
LED_R
IC402
W25X64VSFIG
SYS_RESET
I2S_OUT
DDR2_A[12]
+1.2V_MST
4.7K
4.7K
C455
4.7K
20pF
4.7K
12MHz
X400
1M
R444
+3.3V_MPLL
Main Flash Memory
DDR2_A[0-12]
20pF C454
SUB MICOM
199
EAX61365502(BPR)
H6 Revolution Circuit Diagram
LGE4768A (Matrix Only SD Divx_RM_NON SRS)
H6 R
Main
2009/11/05
4
4
Main
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
Symptom
A. Picture Problem
Making
No Picture/Sound OK
Revision
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D↔ Power B/D, Power B/D↔ Y-sus B/D,Y-Sus B/D ↔Z-Sus B/D,LVDS Cable,Speaker Cable,IR B/D Cable,,,)
Check Module pattern
by using “TILT” key
on SVC R/C
Normal
Y
Check
Sound
Sound
OK
Check
LVDS Cable
Y
Normal
N
Check
Vs, Va
Normal
Y
Check voltage
. -VY
. VSC
. VZB
Replace
Main B/D
Normal
N
Y
Check B+ Voltage
on Power Board
/ Control Board
.Check B+(5V)
N
Move
Power problem
Section
Close
N
Move
No Picture/No sound
Section
N
Y
1. Check Y-Sus/ Z-Sus Board
2. Replace defective B/D
Normal
Y
1.Check Control Board
. LED on
. Crystal(X400)
. 1.8V, 3.3V,1.2V 5V FET
. Rom update
2.Replace Control B/D
N
Move
Power problem
Section
※Refer to the Module label for each voltage
<SVC R/C & Pattern>
-VY
VSC
VZB
1
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
Symptom
Check Module pattern
by using “TILT” key
on SVC R/C
Normal
Y
Check
Sound
A. Picture Problem
Making
No Picture/No Sound
Revision
Sound
OK
Y
Check
LVDS Cable
Normal
Close
N
N
Move
No Picture/ Sound Ok
Section
Y
N
Replace
Main B/D
Check IR operation
Normal
N
Repair/Replace
IR B/D
Y
Y
Power
LED ON?
N
Check Input signal
. RF Cable connection
. SCART Cable connection
. HDMI Cable connection
. Component Cable …
N
Latest S/W update
from GCSC
(Firmware Management)
Normal
OSD
appear?
Y
Replace
Main B/D
N
Y
Close
2
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
Check
Picture problem
Type
A. Picture Problem
Symptom
Making
Mal-discharge/Noise/dark picture
Check CTRL ROM Ver.
and
Rom Upgrade
Dot
type
Normal
Picture?
N
Revision
Replace
Control board
Normal
Picture?
Y
N
Replace
Module
Y
Mal-discharge
Close
Scan
Type
Check voltage
. –VY / VSC
(Y-Sus B/D)
Y
Normal
Picture?
Check
Y Drive B/D
&
Replace B/D
Close
Normal
Picture?
N 1.Check Control B/D
2.Replace Board
Y
N
N
Normal
Picture?
Y
Close
Replace
Y-Sus B/D
Close
※Check Discharge resistance (10Ω 2~3ea)
on Power B/D before replace Y Drive B/D
Picture Noise
Check RF Cable
Connection
N
Normal
Picture?
Check Tuner
& Replace
Y
Close
Dark Picture
Check
Picture mode
setting
Normal
Picture?
N
1. Check Z-Sus Board
2. Replace Board
Normal
Picture?
Y
Y
Close
Close
3
N
Replace
Module
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
Symptom
A. Picture Problem
Making
Picture broken/Freezing
Revision
. By using signal level meter
Check RF Signal level
Normal
Signal?
Y
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc
N
Check RF Cable
Connection
1. Reconnection
Normal
Picture?
Y
Check
S/W Version
N
Normal
Picture?
Y
N
Normal
Picture?
SVC
Bulletin?
S/W Upgrade
Y
Close
Close
N
Check
Tuner soldering
Contact with signal distributor
or broadcaster (Cable or Air)
Normal
Picture?
Y
N
Replace
Main B/D
Y
Close
4
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
Check
defect type
A. Picture Problem
Making
Vertical bar/ Horizontal Bar
Revision
Symptom
Check Module pattern
by using “TILT” key
on SVC R/C
Regular
Vertical
Line / Bar
Y
Normal
Pattern?
Replace
Module
N
1.Check CTRL B/D
2.Replace Board
Vertical
Line/Bar
Irregular
Vertical
Line / Bar
Check connection
of Connector
(COF,TCP)
on CTRL B/D , X B/D
Normal
Y
1.Check CTRL B/D
2.Replace Board
※CTRL B/D: Control board
Normal
Picture?
N
Check Main B/D
Replace Module
(If Main B/D doesn’t cause)
N
Y
1.Connector re-connection
2.Eliminate foreign material on Connector
Half
No picture
1.Check X B/D
2.Replace Board
Normal
Picture?
N
Close
Replace
Module
Y
Close
Horizontal
Line/Bar
Check connection
of Connector (FPC)
on Y Drive B/D
Normal
Y
※ H-Line’s Cause is rare CTRL B/D
1. Check Y Drive B/D
2. Replace Board
N
1.Connector re-connection
2.Eliminate foreign material on FFC
5
Normal
Picture?
N
1.Check CTRL B/D
2.Replace Board
Normal
Picture?
Y
Y
Close
Close
N
Replace
Module
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
Check
Power LED
B. Power Problem
Symptom
Making
No Power (Not turn on)
Y
Power LED
ON?
DC Power on
by pressing Power Key
On Remote control
N
Normal
. Stand-By: Red
. Operating: White or Black N
Revision
Check
R/C IR Operation
Y
N
Normal
Repair/Replace
IR B/D
Y
Close
Check Power cord
was inserted properly
Normal
?
Y
Close
N
Check ST-BY 3.5V
on Power Board
Normal Y
Voltage?
N
Check
AC DET Signal
on Power B/D
Normal
Signal?
Y
Check
RL_ON Signal
on Power B/D
Normal
Signal?
Y
N
N
Check Power B/D
Replace Power B/D
Check Main B/D
Replace Main B/D
6
Check
the other pin’s
Output voltage
on Power B/D
N
Normal
Replace
Power B/D
Y
Close
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
B. Power Problem
Making
Turn off (Instant, under watching)
Revision
Symptom
※ To check Power B/D Protection
Instant
Turn off
Turn on after pull out connector
between Power B/D & Y-Sus
Power LED
Green?
Y
1. Check Y-Sus/ Z-Sus Board
(especially Short or Open)
2. Replace defective B/D
N
Check Power B/D
Replace Power B/D
RCU Off
Turn off
Under watching
N
“Off Timer”
Set?
KEY Off
Check
Power Off History
2HOUR Off
This is not problem
Normal operation
Y
NO Signal Off
“Off timer”
Function off
Don’t appear
Power Off History
7
Move
No Power problem
Section
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
C. Sound Problem
Symptom
Making
No sound/ Sound distortion
Revision
1.No sound( If HDMI Input only have no sound, upload EDID data)
Check
“Speaker ON/Off” setting
in OSD Menu
Normal
Sound?
N
Check Speaker
jack connection
& Speaker Cable open
Close
Normal
Sound?
Y
N
Y
SVC
Bulletin?
Apply
SVC Bulletin
(S/W Upgrade etc)
N
Y
Y
Normal
Sound?
N
Close
Close
Check 17V
(Audio IC B+)
on Power B/D
Normal
voltage?
N
Check Power B/D
Replace Power B/D
2.Sound distortion & sound drop
Check Input signal
→Cable connection
→Cable open
- RF & external
(HDMI,SCART,,,)
Problem in all input
Normal
Sound?
N
Check
AVL off/on
Clear voiceⅡ off/on
Y
Normal
Sound?
N
Y
Close
Problem in external input (Case 2)
(SCART,HDMI,,,)
Close
Check whether Problem happen
in same output of other equipments or not.
(By connecting same output cable of other equipment)
→ DVD Player ,Set-Top-Box, different maker TV etc
N
Normal
Sound?
SVC
Bulletin?
Y
N
Explain customer that
Cause is RF Signal’s problem (Case 1)
Cause is Equipment’s problem (case 2)
8
Y
Apply
SVC Bulletin
(S/W Upgrade etc)
Normal
Sound?
Y
Close
N
Check Audio IC
Replace Main B/D
ⓒ LG Electronics. Inc.2009
Repair Process
PDP TV
D. General Function Problem
Symptom
Remote control
Making
Revision
1. Remote control (R/C) operating error
Replace
Main B/D
Check R/C itself
Operation
Normal Y
operating?
Check & Repair
Cable connection
Connector solder
N
Normal
operating?
N
Check & Replace
Baterry of R/C
If R/C operate,
Explain the customer
cause is interference
from light in room.
Normal Y
operating?
Normal
Voltage?
Y
Check IR
Output signal
N
Y
Check R/C Operating
When turn off light
in room
Check B+ 5V
On Main B/D
Close
Check 5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
Normal
Signal?
N
Repair/Replace
IR B/D
Close
N
Replace R/C
9
ⓒ LG Electronics. Inc.2009
Y
Repair Process-Reference data
PDP TV
Symptom
Item
A. Picture Problem
Check Module pattern by Tilt key
Making
Revision
Tilt Key
You can see 20 types patterns by using TILT Key on SVC Remote controller (except Old model)
< CHECK Item >
1. Dead pixel 2.Image sticking 3.Mal discharge 4.Module defect (V-Line/Bar, H-Line/Bar,,,)
5. In case of no picture, you can judge defect cause (Module or Main B/D)
- If patterns appear, defect cause is Main B/D
A1
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Defect type cause by PDP Module
Making
Revision
First of all, Check whether all of cable between board was inserted properly or not.
Next, Check whether there is foreign material on connector.
Symptom picture
defects description
To action
Regular vertical lines
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Vertical lines or Bar
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Many irregular vertical lines
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Horizontal Line or Bar
1. Check connection
(Y-Sus B/D ↔Panel)
2. Check Y-Sus B/D
3. Replace Y-Sus B/D
A19
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Connector Type on PDP Module
Revision
COF Type
TCP Type
96 Out Put
192 Out Put
1. Check foreign & Connection status
2. Check bad soldering
on Chip resistance
TCP (Tape Carrier Package) is film
for IC connect with Electrode pattern
(Direct Bonding) on X B/D
FPC Type
Connector to connect between
Electrode PAD Of PANEL and
Y Drive B/D,Z-Sus B/D
▣ Defect symptom
A20
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
B. Power Problem
Making
Check voltage on Power board
Revision
Symptom
Pin Map
Power B/D↔Main B/D
(P813)
(P1100)
Checking
Checking Order
Order
No.
P814
1
3
17V
GND
2
4
17V
GND
5
5V
6
5V
7
5V
8
Error_DET
9
GND
10
GND
11
GND
12
GND
13
STBY
14
STBY
15
RL_ON
16
AC_DET
17
Wafer
M_ON
18
AUTO_GND
SMAW200-H18S2
14
16
8
15
17
6
7
A22
Checking
Spec
Point
STBY 5V
5V
AC DET High(3.3V~5V)
Error_DET
5V
RL_ON
High(3.3V~5V)
M5_ON
High(3.3V~5V)
Vs-ON
High(3.3V~5V)
Check the other pin’s output
Remark
ⓒ LG Electronics. Inc.2009