Recopilación de Contador de anillo.

Recopilación de Contador de anillo.
Checar el video de como funciona :
https://startingelectronics.org/software/VHDL-CPLD-course/tut12_ring_counter/
Un ejemplo de programacion 1
Ejemplo 2
Ejemplo 3
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ring_counter_top is
Port ( CLK : in
LED : out
end ring_counter_top;
STD_LOGIC;
STD_LOGIC_VECTOR (7 downto 0));
architecture Behavioral of ring_counter_top is
signal clock_div : STD_LOGIC_VECTOR(4 downto 0);
--signal shift_reg : STD_LOGIC_VECTOR(7 downto 0) := X"80";
signal shift_reg : STD_LOGIC_VECTOR(7 downto 0) := X"7F";
begin
-- clock divider: slows clock to make LEDs visible
process (CLK)
begin
if (CLK'event and CLK = '1') then
clock_div <= clock_div + '1';
end if;
end process;
-- ring counter
process (clock_div(4))
begin
if (clock_div(4)'event and clock_div(4) = '1') then
shift_reg(7) <= shift_reg(0);
shift_reg(6) <= shift_reg(7);
shift_reg(5) <= shift_reg(6);
shift_reg(4) <= shift_reg(5);
shift_reg(3) <= shift_reg(4);
shift_reg(2) <= shift_reg(3);
shift_reg(1) <= shift_reg(2);
shift_reg(0) <= shift_reg(1);
end if;
end process;
-- hook up the ring counter register bits to the LEDs
LED <= shift_reg;
end Behavioral;
USANDO palabra reservada ROR:
Etc. Checa página web
https://startingelectronics.org/software/VHDL-CPLD-course/tut12_ring_counter/