Slides - Indico

Actividades de electrónica para el
Calorímetro Hadrónico de ATLAS
Alberto Valero, Pablo Moreno, Fernando Carrió
Reunión de electronicos
Instituto de Física
Corpuscular
13 de Junio de 2012
Introduc)on. TileCal Read-­‐out 13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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TileCal Read-­‐Out Drivers •  Main functionalities
–  Signal reconstruction @ 100 kHz ( 96 Pmts / 10 μs) without introducing deadtime
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Trigger/data synchronization. Generation of L1 Veto (BUSY)
Energy, Time, QF
Compressed data packing of samples
SumE, SumET, SumEz
•  Activities:
–  Optimization of processing time to run at 100kHz– reduced deadtime (Busy)
•  Migration from C code to assembler
–  Optimization data compression algorithms
–  New algorihtms for L2 triggers (SumEt)
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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Op)cal Mul)plexer Board •  Main Functionalities:
–  Selection of data packets in real-time
–  Emulation of detector signal for RODs developments
and tests
–  Digital errors monitoring at 100 kHz
•  Activities:
–  Design of OMB (VME9U, 10 layes, 10 BGA
FPGAs)
–  Production and qualification of 45 boards
–  Firmware development and optimization (real-time
system)
OMB
CRC CHECK &
INJECTOR
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
ROD
SIGNAL
RECONSTRUCTION
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Processing Daughterboard • 
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13/06/12
Goal: Digital signal processing in FPGA evaluation
Merge: 2xDSP + 3xFPGA + 2xFIFO in one FPGA
Motherboard: ROD (TileCal)
Designed also for standalone mode
ALTERA Cyclone III device
SDRAM and system FLASH memory
User GPIOs and interface
Alberto Valero -- Reunión de electrónicos - IFIC
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Mobidick. Introduc)on • 
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Mobile Drawer Integrity ChecKing
It is a standalone test system used for full certification of the installed front-end
electronics during maintenance periods
First versions of the system HW where composed of a portable VME crate, a set of
VME boards and a laptop
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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Embedded System PowerPC TTC_Ctrl (Custom IP) 440 MHz/256 Mb RAM TTC.vhd SFP Glue SW PLB 46 BUS -­‐ 100 MHz GL_Ctrl (Custom IP) Glink.vhd ADC_Ctrl (Custom IP) ADC.vhd ADCs LED driver HV_L_Ctrl (Custom IP) Ethern. MAC Willy 13/06/12
USB sROD demo 2 Serial ports CAN bus HV_LED.vhd Power Supply Embedded System ML507 Alberto Valero -- Reunión de electrónicos - IFIC
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TileCal electronics Upgrade •  Full replacement of read-out electronics in Phase-II ( ~2021)
–  Front-end functionalities moved to back-end system
•  Pipelines, L1Calo, Derandomizers
–  Current system ~165 Gbps à Upgrade : ~ 20 Tbps (x100)
–  ATCA standard ( replace present VME)
•  Not so far….. Installation of a demonstrator system end of 2014
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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AMC sRODdemo board ATCA carrier • 
AMC standard compliant
–  Double mid-size AMC (180.6x 148.5 mm)
–  Can be plugged in a ATCA carrier or in a uTCA
platform
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Processing Units:
–  1 Xilinx Virtex 7 FPGA:
•  XC7VX485T-2FFG1558
•  48 MGT@10Gbps
–  1 Xilinx Kintex 7 FPGA
•  XC7K480T-2FFG901
•  24 MGT@10Gbps
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Memories: DDR3 SDRAM
–  4 GB per FPGA
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Microblaze + Linux
Configuration unit - 3 ways:
–  Parallel flash memory (1GB)
–  JTAG (local)
–  JTAG (remote via AMC connector)
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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ATCA test bench • 
ATCA test bench at IFIC laboratories (Valencia)
–  Complete system from Radisys
–  Fully operative
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SYS6006 Platform
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ATCA-1200 Carrier
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ATCA 6 slots chasis
test bench Dual star topology
One Switch – communication between ATCA blades
Shelf management module
4 single/2 double AMC
Power distribution
High-speed communication with RTM
High-speed communication other ATCA modules
High-speed communication between AMCs
A1200 RTM
–  4 SFP optical modules per AMC (Total of 16 SFPs)
–  Connection to ATCA-1200 through zone 3 connector
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ATCA 4500
–  Compute Processing module with RTM
–  Scientific Linux 5 already installed!
VME crate 13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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Colaboración Silica-­‐Avnet-­‐Xilinx •  Estamos colaborando con Silica/Avnet principalmente para
dispositivos de Xilinx
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Tarjetas evaluación
Licencias software
IP cores
X-fest (seminarios gratuitos)
Información de cursos/seminarios especificos FPGA/VHDL
•  Han ofrecido la posibilidad de realizar un seminario:
–  Silica. Componentes electrónicos (AMD, Analog, TI,Maxim, Infineon….)
–  Especifico de Xilinx
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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BONUS SLIDES PCB Details •  10-­‐layer class 6 standard PCB •  Signal layers adjacent to planes for minimum loop inductance •  6 signal layers for 484-­‐BGA rou)ng •  Trace widths designed to match Zo = 50 Ω •  280 nets into 630 etch traces Data and control •  1030 vias lines 2w = 300 μm 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC Clock lines 3w = 450 μm 13 Motherboard Xilinx ML507 evalua)on pladorm • 
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Virtex 5 FPGA •  10/100/1000 Ethernet MAC •  GTX Transceivers •  PowerPC 440 RISC Microprocessor 256 MB DDR RAM (expandable) Pladorm Flash Serial port, SFP, RJ45, USB (host & peripheral ports) 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC 14 Trigger ADC board • 
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Four-­‐layer PCB fully manufactured in IFIC Two Texas Instruments 8-­‐channel ADCs (ADS5271) Analog input stage for every channel Clock network: local 40 MHz oscillator and clock buffer to feed both ADCs Connector to plug in the Motherboard and trigger cable connectors for box First version already produced, being tested Second version designed (minor changes) 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC 15 Power supply board • 
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PCB manufactured in IFIC One common supply provides all necessary voltages Three connectors provide: • 
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Analog +24V, +12V, -­‐12V, +5V, -­‐5V Digital +5V First version with minor design problems Second version: 2 boards produced Fully opera)onal 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC 16 HV and LED driver HV control • 
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Uses +24V, +5V One TTL input for relay control One HV output LED driver • 
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Uses +24V, +5V, -­‐12V One ECL input for trigger Two 50 ohm outputs for LEDs Generates 20V, 20ns pulse for LED Work in Clermont-­‐Ferrand: boards already produced (tes)ng phase) 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC 17 CAN bus Interface board • 
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A interface PCB provides communica)on between the MB and the CAN bus PCB produced in IFIC Relays on expensive Xilinx IP core and MicroBlaze Alterna)ve discarded CAN-­‐RS232 • 
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Commercial dongle converts serial port commands into CAN Cost: 79 euros Directly pluggable into ML507 COM port Need extra adapter DB9 to DB15 in order to fit superdrawer connector 13/06/12 Alberto Valero -­‐-­‐ Reunión de electrónicos -­‐ IFIC 18 MMC mezzanine •  MMC Mezannine
–  CPPM/DESY/CERN collaboration
–  Manage hot swap sequence
–  Board asset information
•  Manufacturer, product name, model number, serial number,
geographical information, version..
MMC Mezannine –  Monitor functions
•  Board and components temperature, voltage levels,…
–  Relies on IPMI (Intelligent Platform
Management Interface) communication standard
–  We have acquired two MMC mezzanines
•  MMC Test AMC board
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CERN development
Single-width mid-size AMC board
Function: Test MMC mezzanine
PH-ESE-BE group has lent us one board for testing
MMC Test AMC 13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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Status & Plans •  AMC sRODdemo board
–  Double mid-size AMC board
•  Plugged in a Radisys ATCA-1200 carrier
–  Capable of receiving and processing data from one new drawer
–  L0/L1 Calo preprocessor functionalities
–  Status:
•  Main components already order
–  Avago MiniPODs modules
–  Virtex 7 and Kintex 7 FPGAs
•  Schematics are being designed
–  Expected for end of June
•  PCB Layout
–  Expected for end of Summer
•  First prototype by November 2012
•  In parallel - ATCA test bench is fully operative
–  Compute Processing Module with Scientific Linux 5
–  Starting tests with MMC Test Board
13/06/12
Alberto Valero -- Reunión de electrónicos - IFIC
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