Arquitecturas Paralelas

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2008 - Intel Core i7
Nehalem represents the largest architectural change in the Intel x86 family since the Pentium Pro in 1995.
The Nehalem architecture has many new features.
The ones that represent significant changes from the Core 2 include:
FSB is replaced by QuickPath interface. Motherboards must use a chipset that supports QuickPath. As of
November 2008, only the Intel X58 does this. The Intel QuickPath Interconnect is a point-to-point processor
interconnect developed by Intel to compete with HyperTransport. It will replace the Front Side Bus (FSB) for
Desktop, Xeon, and Itanium platforms. Intel will first deliver it in November 2008 on the Intel Core i7 desktop
processor and the X58 chipset, and it will be used on new Nehalem-based Xeon processors and Tukwila-based
Itanium processors.
On-die memory controller: the memory is directly connected to the processor.
Three channel memory: each channel can support one or two DDR3 DIMMs. Motherboards for Core i7 have
four (3+1) or six DIMM slots instead of two or four, and DIMMs should be installed in sets of three, not two.
Support for DDR3 only.
Single-die device: all four cores, the memory controller, and all cache are on a single die.
"Turbo Boost" technology allows the cores to intelligently clock themselves to 133MHz or 266MHz over the
design clock speed so long as the CPU's thermal requirements are still met. This mode isn't enabled when the
CPU is manually over-clocked by the user.
Re-implemented Hyper-threading. Each of the four cores can process two threads simultaneously, so the
processor appears to the OS as eight CPUs. This feature was present in the older Netburst architecture but was
dropped in Core.
On-die, shared, inclusive 8MB L3 cache.
Only one QuickPath interface: not intended for multi-processor motherboards.
45nm process technology.
731M transistors.
Sophisticated power management can place an unused core in a zero-power mode.
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